freedreno/a3xx-a6xx+ir3: move emit_const* to screen
These don't need to be in context, and we'll need them in screen in a later patch. Plus it's a good cleanup. Signed-off-by: Rob Clark <robdclark@chromium.org>
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@ -948,13 +948,14 @@ fd3_emit_restore(struct fd_batch *batch, struct fd_ringbuffer *ring)
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void
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fd3_emit_init_screen(struct pipe_screen *pscreen)
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{
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struct fd_screen *screen = fd_screen(pscreen);
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screen->emit_const = fd3_emit_const;
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screen->emit_const_bo = fd3_emit_const_bo;
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}
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void
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fd3_emit_init(struct pipe_context *pctx)
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{
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struct fd_context *ctx = fd_context(pctx);
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ctx->emit_const = fd3_emit_const;
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ctx->emit_const_bo = fd3_emit_const_bo;
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ctx->emit_ib = fd3_emit_ib;
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}
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@ -935,14 +935,16 @@ fd4_mem_to_mem(struct fd_ringbuffer *ring, struct pipe_resource *dst,
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void
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fd4_emit_init_screen(struct pipe_screen *pscreen)
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{
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struct fd_screen *screen = fd_screen(pscreen);
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screen->emit_const = fd4_emit_const;
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screen->emit_const_bo = fd4_emit_const_bo;
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}
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void
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fd4_emit_init(struct pipe_context *pctx)
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{
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struct fd_context *ctx = fd_context(pctx);
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ctx->emit_const = fd4_emit_const;
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ctx->emit_const_bo = fd4_emit_const_bo;
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ctx->emit_ib = fd4_emit_ib;
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ctx->mem_to_mem = fd4_mem_to_mem;
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}
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@ -1122,14 +1122,15 @@ fd5_mem_to_mem(struct fd_ringbuffer *ring, struct pipe_resource *dst,
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void
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fd5_emit_init_screen(struct pipe_screen *pscreen)
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{
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struct fd_screen *screen = fd_screen(pscreen);
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screen->emit_const = fd5_emit_const;
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screen->emit_const_bo = fd5_emit_const_bo;
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}
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void
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fd5_emit_init(struct pipe_context *pctx)
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{
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struct fd_context *ctx = fd_context(pctx);
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ctx->emit_const = fd5_emit_const;
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ctx->emit_const_bo = fd5_emit_const_bo;
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ctx->emit_ib = fd5_emit_ib;
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ctx->mem_to_mem = fd5_mem_to_mem;
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}
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@ -1333,14 +1333,15 @@ fd6_framebuffer_barrier(struct fd_context *ctx)
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void
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fd6_emit_init_screen(struct pipe_screen *pscreen)
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{
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struct fd_screen *screen = fd_screen(pscreen);
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screen->emit_const = fd6_emit_const;
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screen->emit_const_bo = fd6_emit_const_bo;
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}
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void
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fd6_emit_init(struct pipe_context *pctx)
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{
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struct fd_context *ctx = fd_context(pctx);
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ctx->emit_const = fd6_emit_const;
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ctx->emit_const_bo = fd6_emit_const_bo;
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ctx->emit_ib = fd6_emit_ib;
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ctx->mem_to_mem = fd6_mem_to_mem;
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ctx->framebuffer_barrier = fd6_framebuffer_barrier;
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@ -327,14 +327,6 @@ struct fd_context {
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/* compute: */
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void (*launch_grid)(struct fd_context *ctx, const struct pipe_grid_info *info);
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/* constant emit: (note currently not used/needed for a2xx) */
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void (*emit_const)(struct fd_ringbuffer *ring, gl_shader_stage type,
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uint32_t regid, uint32_t offset, uint32_t sizedwords,
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const uint32_t *dwords, struct pipe_resource *prsc);
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/* emit bo addresses as constant: */
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void (*emit_const_bo)(struct fd_ringbuffer *ring, gl_shader_stage type, boolean write,
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uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets);
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/* indirect-branch emit: */
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void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringbuffer *target);
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@ -94,6 +94,14 @@ struct fd_screen {
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uint32_t (*setup_slices)(struct fd_resource *rsc);
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unsigned (*tile_mode)(const struct pipe_resource *prsc);
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/* constant emit: (note currently not used/needed for a2xx) */
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void (*emit_const)(struct fd_ringbuffer *ring, gl_shader_stage type,
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uint32_t regid, uint32_t offset, uint32_t sizedwords,
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const uint32_t *dwords, struct pipe_resource *prsc);
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/* emit bo addresses as constant: */
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void (*emit_const_bo)(struct fd_ringbuffer *ring, gl_shader_stage type, boolean write,
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uint32_t regid, uint32_t num, struct pipe_resource **prscs, uint32_t *offsets);
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int64_t cpu_gpu_time_delta;
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struct fd_batch_cache batch_cache;
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@ -207,7 +207,7 @@ emit_const(struct fd_context *ctx, struct fd_ringbuffer *ring,
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{
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assert(dst_offset + size <= v->constlen * 4);
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ctx->emit_const(ring, v->type, dst_offset,
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ctx->screen->emit_const(ring, v->type, dst_offset,
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offset, size, user_buffer, buffer);
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}
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@ -274,7 +274,7 @@ emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
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assert(offset * 4 + params < v->constlen * 4);
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ring_wfi(ctx->batch, ring);
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ctx->emit_const_bo(ring, v->type, false, offset * 4, params, prscs, offsets);
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ctx->screen->emit_const_bo(ring, v->type, false, offset * 4, params, prscs, offsets);
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}
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}
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@ -408,7 +408,7 @@ emit_tfbos(struct fd_context *ctx, const struct ir3_shader_variant *v,
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assert(offset * 4 + params < v->constlen * 4);
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ring_wfi(ctx->batch, ring);
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ctx->emit_const_bo(ring, v->type, true, offset * 4, params, prscs, offsets);
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ctx->screen->emit_const_bo(ring, v->type, true, offset * 4, params, prscs, offsets);
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}
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}
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