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st/mesa: emit TXQS, support ARB_shader_texture_image_samples 

The image component of the ext is a no-op since there is no image support
in gallium (yet).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
This commit is contained in:
Ilia Mirkin 2015-09-10 21:44:45 -04:00
parent ec3fe42b3a
commit 67d2d3ba43
4 changed files with 8 additions and 3 deletions
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2
docs/GL3.txt
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@ -194,7 +194,7 @@ GL 4.5, GLSL 4.50:
GL_ARB_derivative_control DONE (i965, nv50, nvc0, r600, radeonsi)
GL_ARB_direct_state_access DONE (all drivers)
GL_ARB_get_texture_sub_image DONE (all drivers)
GL_ARB_shader_texture_image_samples DONE (i965)
GL_ARB_shader_texture_image_samples DONE (i965, nv50, nvc0, r600)
GL_ARB_texture_barrier DONE (nv50, nvc0, r600, radeonsi)
GL_KHR_context_flush_control DONE (all - but needs GLX/EGL extension to be useful)
GL_KHR_robust_buffer_access_behavior not started

2
docs/relnotes/11.1.0.html
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@ -44,7 +44,7 @@ Note: some of the new features are only available with certain drivers.
</p>
<ul>
<li>GL_ARB_shader_texture_image_samples on i965</li>
<li>GL_ARB_shader_texture_image_samples on i965, nv50, nvc0, r600</li>
<li>GL_ARB_texture_query_lod on softpipe</li>
<li>GL_ARB_gpu_shader_fp64 on r600 for Cypress/Cayman/Aruba chips</li>
</ul>

1
src/mesa/state_tracker/st_extensions.c
View File

@ -449,6 +449,7 @@ void st_init_extensions(struct pipe_screen *screen,
{ o(ARB_point_sprite), PIPE_CAP_POINT_SPRITE },
{ o(ARB_seamless_cube_map), PIPE_CAP_SEAMLESS_CUBE_MAP },
{ o(ARB_shader_stencil_export), PIPE_CAP_SHADER_STENCIL_EXPORT },
{ o(ARB_shader_texture_image_samples), PIPE_CAP_TGSI_TXQS },
{ o(ARB_shader_texture_lod), PIPE_CAP_SM3 },
{ o(ARB_shadow), PIPE_CAP_TEXTURE_SHADOW_MAP },
{ o(ARB_texture_buffer_object), PIPE_CAP_TEXTURE_BUFFER_OBJECTS },

6
src/mesa/state_tracker/st_glsl_to_tgsi.cpp
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@ -3229,7 +3229,8 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir)
opcode = TGSI_OPCODE_LODQ;
break;
case ir_texture_samples:
unreachable("unexpected texture op");
opcode = TGSI_OPCODE_TXQS;
break;
}
if (ir->projector) {
@ -3339,6 +3340,8 @@ glsl_to_tgsi_visitor::visit(ir_texture *ir)
emit_asm(ir, TGSI_OPCODE_MOV, result_dst, levels_src);
} else
inst = emit_asm(ir, opcode, result_dst, lod_info);
} else if (opcode == TGSI_OPCODE_TXQS) {
inst = emit_asm(ir, opcode, result_dst);
} else if (opcode == TGSI_OPCODE_TXF) {
inst = emit_asm(ir, opcode, result_dst, coord);
} else if (opcode == TGSI_OPCODE_TXL2 || opcode == TGSI_OPCODE_TXB2) {
@ -5030,6 +5033,7 @@ compile_tgsi_instruction(struct st_translate *t,
case TGSI_OPCODE_TXL:
case TGSI_OPCODE_TXP:
case TGSI_OPCODE_TXQ:
case TGSI_OPCODE_TXQS:
case TGSI_OPCODE_TXF:
case TGSI_OPCODE_TEX2:
case TGSI_OPCODE_TXB2: