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nouveau: get rid of tabs 

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Ilia Mirkin 2015-10-31 19:54:38 -04:00
parent 0ef8c5cb96
commit 67635a0a71
19 changed files with 549 additions and 549 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
View File

@ -73,8 +73,8 @@ public:
Instruction *mkCvt(operation, DataType, Value *, DataType, Value *);
CmpInstruction *mkCmp(operation, CondCode, DataType,
Value *,
DataType, Value *, Value *, Value * = NULL);
Value *,
DataType, Value *, Value *, Value * = NULL);
TexInstruction *mkTex(operation, TexTarget,
uint16_t tic, uint16_t tsc,
const std::vector<Value *> &def,

2
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
View File

@ -372,7 +372,7 @@ CodeEmitterNV50::setSrcFileBits(const Instruction *i, int enc)
mode |= 3 << (s * 2);
break;
default:
ERROR("invalid file on source %i: %u\n", s, i->src(s).getFile());
ERROR("invalid file on source %i: %u\n", s, i->src(s).getFile());
assert(0);
break;
}

2
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
View File

@ -1638,7 +1638,7 @@ Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr)
// don't load masked inputs, won't be assigned a slot
if (!ptr && !(info->in[idx].mask & (1 << swz)))
return loadImm(NULL, swz == TGSI_SWIZZLE_W ? 1.0f : 0.0f);
if (!ptr && info->in[idx].sn == TGSI_SEMANTIC_FACE)
if (!ptr && info->in[idx].sn == TGSI_SEMANTIC_FACE)
return mkOp1v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_FACE, 0));
return interpolate(src, c, shiftAddress(ptr));
} else

118
src/gallium/drivers/nouveau/nouveau_heap.c
View File

@ -29,95 +29,95 @@ int
nouveau_heap_init(struct nouveau_heap **heap,
unsigned start, unsigned size)
{
struct nouveau_heap *r;
struct nouveau_heap *r;
r = calloc(1, sizeof(struct nouveau_heap));
if (!r)
return 1;
r = calloc(1, sizeof(struct nouveau_heap));
if (!r)
return 1;
r->start = start;
r->size = size;
*heap = r;
return 0;
r->start = start;
r->size = size;
*heap = r;
return 0;
}
void
nouveau_heap_destroy(struct nouveau_heap **heap)
{
if (!*heap)
return;
free(*heap);
*heap = NULL;
if (!*heap)
return;
free(*heap);
*heap = NULL;
}
int
nouveau_heap_alloc(struct nouveau_heap *heap, unsigned size, void *priv,
struct nouveau_heap **res)
{
struct nouveau_heap *r;
struct nouveau_heap *r;
if (!heap || !size || !res || *res)
return 1;
if (!heap || !size || !res || *res)
return 1;
while (heap) {
if (!heap->in_use && heap->size >= size) {
r = calloc(1, sizeof(struct nouveau_heap));
if (!r)
return 1;
while (heap) {
if (!heap->in_use && heap->size >= size) {
r = calloc(1, sizeof(struct nouveau_heap));
if (!r)
return 1;
r->start = (heap->start + heap->size) - size;
r->size = size;
r->in_use = 1;
r->priv = priv;
r->start = (heap->start + heap->size) - size;
r->size = size;
r->in_use = 1;
r->priv = priv;
heap->size -= size;
heap->size -= size;
r->next = heap->next;
if (heap->next)
heap->next->prev = r;
r->prev = heap;
heap->next = r;
r->next = heap->next;
if (heap->next)
heap->next->prev = r;
r->prev = heap;
heap->next = r;
*res = r;
return 0;
}
*res = r;
return 0;
}
heap = heap->next;
}
heap = heap->next;
}
return 1;
return 1;
}
void
nouveau_heap_free(struct nouveau_heap **res)
{
struct nouveau_heap *r;
struct nouveau_heap *r;
if (!res || !*res)
return;
r = *res;
*res = NULL;
if (!res || !*res)
return;
r = *res;
*res = NULL;
r->in_use = 0;
r->in_use = 0;
if (r->next && !r->next->in_use) {
struct nouveau_heap *new = r->next;
if (r->next && !r->next->in_use) {
struct nouveau_heap *new = r->next;
new->prev = r->prev;
if (r->prev)
r->prev->next = new;
new->size += r->size;
new->start = r->start;
new->prev = r->prev;
if (r->prev)
r->prev->next = new;
new->size += r->size;
new->start = r->start;
free(r);
r = new;
}
free(r);
r = new;
}
if (r->prev && !r->prev->in_use) {
r->prev->next = r->next;
if (r->next)
r->next->prev = r->prev;
r->prev->size += r->size;
free(r);
}
if (r->prev && !r->prev->in_use) {
r->prev->next = r->next;
if (r->next)
r->next->prev = r->prev;
r->prev->size += r->size;
free(r);
}
}

12
src/gallium/drivers/nouveau/nouveau_heap.h
View File

@ -44,15 +44,15 @@
* full size of the heap.
*/
struct nouveau_heap {
struct nouveau_heap *prev;
struct nouveau_heap *next;
struct nouveau_heap *prev;
struct nouveau_heap *next;
void *priv;
void *priv;
unsigned start;
unsigned size;
unsigned start;
unsigned size;
int in_use;
int in_use;
};
int

264
src/gallium/drivers/nouveau/nouveau_screen.c
View File

@ -30,211 +30,211 @@ int nouveau_mesa_debug = 0;
static const char *
nouveau_screen_get_name(struct pipe_screen *pscreen)
{
struct nouveau_device *dev = nouveau_screen(pscreen)->device;
static char buffer[128];
struct nouveau_device *dev = nouveau_screen(pscreen)->device;
static char buffer[128];
util_snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
return buffer;
util_snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
return buffer;
}
static const char *
nouveau_screen_get_vendor(struct pipe_screen *pscreen)
{
return "nouveau";
return "nouveau";
}
static const char *
nouveau_screen_get_device_vendor(struct pipe_screen *pscreen)
{
return "NVIDIA";
return "NVIDIA";
}
static uint64_t
nouveau_screen_get_timestamp(struct pipe_screen *pscreen)
{
int64_t cpu_time = os_time_get() * 1000;
int64_t cpu_time = os_time_get() * 1000;
/* getparam of PTIMER_TIME takes about x10 as long (several usecs) */
/* getparam of PTIMER_TIME takes about x10 as long (several usecs) */
return cpu_time + nouveau_screen(pscreen)->cpu_gpu_time_delta;
return cpu_time + nouveau_screen(pscreen)->cpu_gpu_time_delta;
}
static void
nouveau_screen_fence_ref(struct pipe_screen *pscreen,
struct pipe_fence_handle **ptr,
struct pipe_fence_handle *pfence)
struct pipe_fence_handle **ptr,
struct pipe_fence_handle *pfence)
{
nouveau_fence_ref(nouveau_fence(pfence), (struct nouveau_fence **)ptr);
nouveau_fence_ref(nouveau_fence(pfence), (struct nouveau_fence **)ptr);
}
static boolean
nouveau_screen_fence_finish(struct pipe_screen *screen,
struct pipe_fence_handle *pfence,
struct pipe_fence_handle *pfence,
uint64_t timeout)
{
if (!timeout)
return nouveau_fence_signalled(nouveau_fence(pfence));
if (!timeout)
return nouveau_fence_signalled(nouveau_fence(pfence));
return nouveau_fence_wait(nouveau_fence(pfence));
return nouveau_fence_wait(nouveau_fence(pfence));
}
struct nouveau_bo *
nouveau_screen_bo_from_handle(struct pipe_screen *pscreen,
struct winsys_handle *whandle,
unsigned *out_stride)
struct winsys_handle *whandle,
unsigned *out_stride)
{
struct nouveau_device *dev = nouveau_screen(pscreen)->device;
struct nouveau_bo *bo = 0;
int ret;
struct nouveau_device *dev = nouveau_screen(pscreen)->device;
struct nouveau_bo *bo = 0;
int ret;
if (whandle->type != DRM_API_HANDLE_TYPE_SHARED &&
whandle->type != DRM_API_HANDLE_TYPE_FD) {
debug_printf("%s: attempt to import unsupported handle type %d\n",
__FUNCTION__, whandle->type);
return NULL;
}
if (whandle->type != DRM_API_HANDLE_TYPE_SHARED &&
whandle->type != DRM_API_HANDLE_TYPE_FD) {
debug_printf("%s: attempt to import unsupported handle type %d\n",
__FUNCTION__, whandle->type);
return NULL;
}
if (whandle->type == DRM_API_HANDLE_TYPE_SHARED)
ret = nouveau_bo_name_ref(dev, whandle->handle, &bo);
else
ret = nouveau_bo_prime_handle_ref(dev, whandle->handle, &bo);
if (whandle->type == DRM_API_HANDLE_TYPE_SHARED)
ret = nouveau_bo_name_ref(dev, whandle->handle, &bo);
else
ret = nouveau_bo_prime_handle_ref(dev, whandle->handle, &bo);
if (ret) {
debug_printf("%s: ref name 0x%08x failed with %d\n",
__FUNCTION__, whandle->handle, ret);
return NULL;
}
if (ret) {
debug_printf("%s: ref name 0x%08x failed with %d\n",
__FUNCTION__, whandle->handle, ret);
return NULL;
}
*out_stride = whandle->stride;
return bo;
*out_stride = whandle->stride;
return bo;
}
bool
nouveau_screen_bo_get_handle(struct pipe_screen *pscreen,
struct nouveau_bo *bo,
unsigned stride,
struct winsys_handle *whandle)
struct nouveau_bo *bo,
unsigned stride,
struct winsys_handle *whandle)
{
whandle->stride = stride;
whandle->stride = stride;
if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
return nouveau_bo_name_get(bo, &whandle->handle) == 0;
} else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
whandle->handle = bo->handle;
return true;
} else if (whandle->type == DRM_API_HANDLE_TYPE_FD) {
return nouveau_bo_set_prime(bo, (int *)&whandle->handle) == 0;
} else {
return false;
}
if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
return nouveau_bo_name_get(bo, &whandle->handle) == 0;
} else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
whandle->handle = bo->handle;
return true;
} else if (whandle->type == DRM_API_HANDLE_TYPE_FD) {
return nouveau_bo_set_prime(bo, (int *)&whandle->handle) == 0;
} else {
return false;
}
}
int
nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev)
{
struct pipe_screen *pscreen = &screen->base;
struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
struct nvc0_fifo nvc0_data = { };
uint64_t time;
int size, ret;
void *data;
union nouveau_bo_config mm_config;
struct pipe_screen *pscreen = &screen->base;
struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 };
struct nvc0_fifo nvc0_data = { };
uint64_t time;
int size, ret;
void *data;
union nouveau_bo_config mm_config;
char *nv_dbg = getenv("NOUVEAU_MESA_DEBUG");
if (nv_dbg)
nouveau_mesa_debug = atoi(nv_dbg);
char *nv_dbg = getenv("NOUVEAU_MESA_DEBUG");
if (nv_dbg)
nouveau_mesa_debug = atoi(nv_dbg);
/*
* this is initialized to 1 in nouveau_drm_screen_create after screen
* is fully constructed and added to the global screen list.
*/
screen->refcount = -1;
/*
* this is initialized to 1 in nouveau_drm_screen_create after screen
* is fully constructed and added to the global screen list.
*/
screen->refcount = -1;
if (dev->chipset < 0xc0) {
data = &nv04_data;
size = sizeof(nv04_data);
} else {
data = &nvc0_data;
size = sizeof(nvc0_data);
}
if (dev->chipset < 0xc0) {
data = &nv04_data;
size = sizeof(nv04_data);
} else {
data = &nvc0_data;
size = sizeof(nvc0_data);
}
/*
* Set default VRAM domain if not overridden
*/
if (!screen->vram_domain) {
if (dev->vram_size > 0)
screen->vram_domain = NOUVEAU_BO_VRAM;
else
screen->vram_domain = NOUVEAU_BO_GART;
}
/*
* Set default VRAM domain if not overridden
*/
if (!screen->vram_domain) {
if (dev->vram_size > 0)
screen->vram_domain = NOUVEAU_BO_VRAM;
else
screen->vram_domain = NOUVEAU_BO_GART;
}
ret = nouveau_object_new(&dev->object, 0, NOUVEAU_FIFO_CHANNEL_CLASS,
data, size, &screen->channel);
if (ret)
return ret;
screen->device = dev;
ret = nouveau_object_new(&dev->object, 0, NOUVEAU_FIFO_CHANNEL_CLASS,
data, size, &screen->channel);
if (ret)
return ret;
screen->device = dev;
ret = nouveau_client_new(screen->device, &screen->client);
if (ret)
return ret;
ret = nouveau_pushbuf_new(screen->client, screen->channel,
4, 512 * 1024, 1,
&screen->pushbuf);
if (ret)
return ret;
ret = nouveau_client_new(screen->device, &screen->client);
if (ret)
return ret;
ret = nouveau_pushbuf_new(screen->client, screen->channel,
4, 512 * 1024, 1,
&screen->pushbuf);
if (ret)
return ret;
/* getting CPU time first appears to be more accurate */
screen->cpu_gpu_time_delta = os_time_get();
/* getting CPU time first appears to be more accurate */
screen->cpu_gpu_time_delta = os_time_get();
ret = nouveau_getparam(dev, NOUVEAU_GETPARAM_PTIMER_TIME, &time);
if (!ret)
screen->cpu_gpu_time_delta = time - screen->cpu_gpu_time_delta * 1000;
ret = nouveau_getparam(dev, NOUVEAU_GETPARAM_PTIMER_TIME, &time);
if (!ret)
screen->cpu_gpu_time_delta = time - screen->cpu_gpu_time_delta * 1000;
pscreen->get_name = nouveau_screen_get_name;
pscreen->get_vendor = nouveau_screen_get_vendor;
pscreen->get_device_vendor = nouveau_screen_get_device_vendor;
pscreen->get_name = nouveau_screen_get_name;
pscreen->get_vendor = nouveau_screen_get_vendor;
pscreen->get_device_vendor = nouveau_screen_get_device_vendor;
pscreen->get_timestamp = nouveau_screen_get_timestamp;
pscreen->get_timestamp = nouveau_screen_get_timestamp;
pscreen->fence_reference = nouveau_screen_fence_ref;
pscreen->fence_finish = nouveau_screen_fence_finish;
pscreen->fence_reference = nouveau_screen_fence_ref;
pscreen->fence_finish = nouveau_screen_fence_finish;
util_format_s3tc_init();
util_format_s3tc_init();
screen->lowmem_bindings = PIPE_BIND_GLOBAL; /* gallium limit */
screen->vidmem_bindings =
PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL |
PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT |
PIPE_BIND_CURSOR |
PIPE_BIND_SAMPLER_VIEW |
PIPE_BIND_SHADER_BUFFER | PIPE_BIND_SHADER_IMAGE |
PIPE_BIND_COMPUTE_RESOURCE |
PIPE_BIND_GLOBAL;
screen->sysmem_bindings =
PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT |
PIPE_BIND_COMMAND_ARGS_BUFFER;
screen->lowmem_bindings = PIPE_BIND_GLOBAL; /* gallium limit */
screen->vidmem_bindings =
PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL |
PIPE_BIND_DISPLAY_TARGET | PIPE_BIND_SCANOUT |
PIPE_BIND_CURSOR |
PIPE_BIND_SAMPLER_VIEW |
PIPE_BIND_SHADER_BUFFER | PIPE_BIND_SHADER_IMAGE |
PIPE_BIND_COMPUTE_RESOURCE |
PIPE_BIND_GLOBAL;
screen->sysmem_bindings =
PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_STREAM_OUTPUT |
PIPE_BIND_COMMAND_ARGS_BUFFER;
memset(&mm_config, 0, sizeof(mm_config));
memset(&mm_config, 0, sizeof(mm_config));
screen->mm_GART = nouveau_mm_create(dev,
NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
&mm_config);
screen->mm_VRAM = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, &mm_config);
return 0;
screen->mm_GART = nouveau_mm_create(dev,
NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
&mm_config);
screen->mm_VRAM = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, &mm_config);
return 0;
}
void
nouveau_screen_fini(struct nouveau_screen *screen)
{
nouveau_mm_destroy(screen->mm_GART);
nouveau_mm_destroy(screen->mm_VRAM);
nouveau_mm_destroy(screen->mm_GART);
nouveau_mm_destroy(screen->mm_VRAM);
nouveau_pushbuf_del(&screen->pushbuf);
nouveau_pushbuf_del(&screen->pushbuf);
nouveau_client_del(&screen->client);
nouveau_object_del(&screen->channel);
nouveau_client_del(&screen->client);
nouveau_object_del(&screen->channel);
nouveau_device_del(&screen->device);
nouveau_device_del(&screen->device);
}

82
src/gallium/drivers/nouveau/nouveau_screen.h
View File

@ -16,47 +16,47 @@ extern int nouveau_mesa_debug;
struct nouveau_bo;
struct nouveau_screen {
struct pipe_screen base;
struct nouveau_device *device;
struct nouveau_object *channel;
struct nouveau_client *client;
struct nouveau_pushbuf *pushbuf;
struct pipe_screen base;
struct nouveau_device *device;
struct nouveau_object *channel;
struct nouveau_client *client;
struct nouveau_pushbuf *pushbuf;
int refcount;
int refcount;
unsigned vidmem_bindings; /* PIPE_BIND_* where VRAM placement is desired */
unsigned sysmem_bindings; /* PIPE_BIND_* where GART placement is desired */
unsigned lowmem_bindings; /* PIPE_BIND_* that require an address < 4 GiB */
/*
* For bindings with (vidmem & sysmem) bits set, PIPE_USAGE_* decides
* placement.
*/
unsigned vidmem_bindings; /* PIPE_BIND_* where VRAM placement is desired */
unsigned sysmem_bindings; /* PIPE_BIND_* where GART placement is desired */
unsigned lowmem_bindings; /* PIPE_BIND_* that require an address < 4 GiB */
/*
* For bindings with (vidmem & sysmem) bits set, PIPE_USAGE_* decides
* placement.
*/
uint16_t class_3d;
uint16_t class_3d;
struct {
struct nouveau_fence *head;
struct nouveau_fence *tail;
struct nouveau_fence *current;
u32 sequence;
u32 sequence_ack;
void (*emit)(struct pipe_screen *, u32 *sequence);
u32 (*update)(struct pipe_screen *);
} fence;
struct {
struct nouveau_fence *head;
struct nouveau_fence *tail;
struct nouveau_fence *current;
u32 sequence;
u32 sequence_ack;
void (*emit)(struct pipe_screen *, u32 *sequence);
u32 (*update)(struct pipe_screen *);
} fence;
struct nouveau_mman *mm_VRAM;
struct nouveau_mman *mm_GART;
struct nouveau_mman *mm_VRAM;
struct nouveau_mman *mm_GART;
int64_t cpu_gpu_time_delta;
int64_t cpu_gpu_time_delta;
bool hint_buf_keep_sysmem_copy;
bool hint_buf_keep_sysmem_copy;
unsigned vram_domain;
unsigned vram_domain;
struct {
unsigned profiles_checked;
unsigned profiles_present;
} firmware_info;
struct {
unsigned profiles_checked;
unsigned profiles_present;
} firmware_info;
#ifdef NOUVEAU_ENABLE_DRIVER_STATISTICS
union {
@ -100,10 +100,10 @@ struct nouveau_screen {
#ifdef NOUVEAU_ENABLE_DRIVER_STATISTICS
# define NOUVEAU_DRV_STAT(s, n, v) do { \
(s)->stats.named.n += (v); \
(s)->stats.named.n += (v); \
} while(0)
# define NOUVEAU_DRV_STAT_RES(r, n, v) do { \
nouveau_screen((r)->base.screen)->stats.named.n += (v); \
# define NOUVEAU_DRV_STAT_RES(r, n, v) do { \
nouveau_screen((r)->base.screen)->stats.named.n += (v); \
} while(0)
# define NOUVEAU_DRV_STAT_IFD(x) x
#else
@ -115,20 +115,20 @@ struct nouveau_screen {
static inline struct nouveau_screen *
nouveau_screen(struct pipe_screen *pscreen)
{
return (struct nouveau_screen *)pscreen;
return (struct nouveau_screen *)pscreen;
}
bool nouveau_drm_screen_unref(struct nouveau_screen *screen);
bool
nouveau_screen_bo_get_handle(struct pipe_screen *pscreen,
struct nouveau_bo *bo,
unsigned stride,
struct winsys_handle *whandle);
struct nouveau_bo *bo,
unsigned stride,
struct winsys_handle *whandle);
struct nouveau_bo *
nouveau_screen_bo_from_handle(struct pipe_screen *pscreen,
struct winsys_handle *whandle,
unsigned *out_stride);
struct winsys_handle *whandle,
unsigned *out_stride);
int nouveau_screen_init(struct nouveau_screen *, struct nouveau_device *);

6
src/gallium/drivers/nouveau/nouveau_statebuf.h
View File

@ -6,9 +6,9 @@
struct nouveau_statebuf_builder
{
uint32_t* p;
uint32_t* p;
#ifdef DEBUG
uint32_t* pend;
uint32_t* pend;
#endif
};
@ -22,7 +22,7 @@ struct nouveau_statebuf_builder
static inline uint32_t sb_header(unsigned subc, unsigned mthd, unsigned size)
{
return (size << 18) | (subc << 13) | mthd;
return (size << 18) | (subc << 13) | mthd;
}
#define sb_method(sb, v, n) sb_data(sb, sb_header(SUBC_3D(v), n));

2
src/gallium/drivers/nouveau/nouveau_video.c
View File

@ -831,7 +831,7 @@ error:
static int
nouveau_screen_get_video_param(struct pipe_screen *pscreen,
enum pipe_video_profile profile,
enum pipe_video_entrypoint entrypoint,
enum pipe_video_entrypoint entrypoint,
enum pipe_video_cap param)
{
switch (param) {

2
src/gallium/drivers/nouveau/nouveau_video.h
View File

@ -83,7 +83,7 @@ BEGIN_NI04(struct nouveau_pushbuf *push, int subc, int mthd, unsigned size)
static inline void
PUSH_MTHDl(struct nouveau_pushbuf *push, int subc, int mthd,
struct nouveau_bo *bo, uint32_t offset,
struct nouveau_bufctx *ctx, int bin, uint32_t rw)
struct nouveau_bufctx *ctx, int bin, uint32_t rw)
{
nouveau_bufctx_mthd(ctx, bin, NV04_FIFO_PKHDR(subc, mthd, 1),
bo, offset,

30
src/gallium/drivers/nouveau/nouveau_vp3_video.h
View File

@ -117,22 +117,22 @@ struct nouveau_vp3_decoder {
};
struct comm {
uint32_t bsp_cur_index; // 000
uint32_t byte_ofs; // 004
uint32_t status[0x10]; // 008
uint32_t pos[0x10]; // 048
uint8_t pad[0x100 - 0x88]; // 0a0 bool comm_encrypted
uint32_t bsp_cur_index; // 000
uint32_t byte_ofs; // 004
uint32_t status[0x10]; // 008
uint32_t pos[0x10]; // 048
uint8_t pad[0x100 - 0x88]; // 0a0 bool comm_encrypted
uint32_t pvp_cur_index; // 100
uint32_t acked_byte_ofs; // 104
uint32_t status_vp[0x10]; // 108
uint16_t mb_y[0x10]; //148
uint32_t pvp_stage; // 168 0xeeXX
uint16_t parse_endpos_index; // 16c
uint16_t irq_index; // 16e
uint8_t irq_470[0x10]; // 170
uint32_t irq_pos[0x10]; // 180
uint32_t parse_endpos[0x10]; // 1c0
uint32_t pvp_cur_index; // 100
uint32_t acked_byte_ofs; // 104
uint32_t status_vp[0x10]; // 108
uint16_t mb_y[0x10]; //148
uint32_t pvp_stage; // 168 0xeeXX
uint16_t parse_endpos_index; // 16c
uint16_t irq_index; // 16e
uint8_t irq_470[0x10]; // 170
uint32_t irq_pos[0x10]; // 180
uint32_t parse_endpos[0x10]; // 1c0
};
static inline uint32_t nouveau_vp3_video_align(uint32_t h)

142
src/gallium/drivers/nouveau/nouveau_vp3_video_bsp.c
View File

@ -23,90 +23,90 @@
#include "nouveau_vp3_video.h"
struct strparm_bsp {
uint32_t w0[4]; // bits 0-23 length, bits 24-31 addr_hi
uint32_t w1[4]; // bit 8-24 addr_lo
uint32_t unk20; // should be idx * 0x8000000, bitstream offset
uint32_t do_crypto_crap; // set to 0
uint32_t w0[4]; // bits 0-23 length, bits 24-31 addr_hi
uint32_t w1[4]; // bit 8-24 addr_lo
uint32_t unk20; // should be idx * 0x8000000, bitstream offset
uint32_t do_crypto_crap; // set to 0
};
struct mpeg12_picparm_bsp {
uint16_t width;
uint16_t height;
uint8_t picture_structure;
uint8_t picture_coding_type;
uint8_t intra_dc_precision;
uint8_t frame_pred_frame_dct;
uint8_t concealment_motion_vectors;
uint8_t intra_vlc_format;
uint16_t pad;
uint8_t f_code[2][2];
uint16_t width;
uint16_t height;
uint8_t picture_structure;
uint8_t picture_coding_type;
uint8_t intra_dc_precision;
uint8_t frame_pred_frame_dct;
uint8_t concealment_motion_vectors;
uint8_t intra_vlc_format;
uint16_t pad;
uint8_t f_code[2][2];
};
struct mpeg4_picparm_bsp {
uint16_t width;
uint16_t height;
uint8_t vop_time_increment_size;
uint8_t interlaced;
uint8_t resync_marker_disable;
uint16_t width;
uint16_t height;
uint8_t vop_time_increment_size;
uint8_t interlaced;
uint8_t resync_marker_disable;
};
struct vc1_picparm_bsp {
uint16_t width;
uint16_t height;
uint8_t profile; // 04 0 simple, 1 main, 2 advanced
uint8_t postprocflag; // 05
uint8_t pulldown; // 06
uint8_t interlaced; // 07
uint8_t tfcntrflag; // 08
uint8_t finterpflag; // 09
uint8_t psf; // 0a
uint8_t pad; // 0b
uint8_t multires; // 0c
uint8_t syncmarker; // 0d
uint8_t rangered; // 0e
uint8_t maxbframes; // 0f
uint8_t dquant; // 10
uint8_t panscan_flag; // 11
uint8_t refdist_flag; // 12
uint8_t quantizer; // 13
uint8_t extended_mv; // 14
uint8_t extended_dmv; // 15
uint8_t overlap; // 16
uint8_t vstransform; // 17
uint16_t width;
uint16_t height;
uint8_t profile; // 04 0 simple, 1 main, 2 advanced
uint8_t postprocflag; // 05
uint8_t pulldown; // 06
uint8_t interlaced; // 07
uint8_t tfcntrflag; // 08
uint8_t finterpflag; // 09
uint8_t psf; // 0a
uint8_t pad; // 0b
uint8_t multires; // 0c
uint8_t syncmarker; // 0d
uint8_t rangered; // 0e
uint8_t maxbframes; // 0f
uint8_t dquant; // 10
uint8_t panscan_flag; // 11
uint8_t refdist_flag; // 12
uint8_t quantizer; // 13
uint8_t extended_mv; // 14
uint8_t extended_dmv; // 15
uint8_t overlap; // 16
uint8_t vstransform; // 17
};
struct h264_picparm_bsp {
// 00
uint32_t unk00;
// 04
uint32_t log2_max_frame_num_minus4; // 04 checked
uint32_t pic_order_cnt_type; // 08 checked
uint32_t log2_max_pic_order_cnt_lsb_minus4; // 0c checked
uint32_t delta_pic_order_always_zero_flag; // 10, or unknown
// 00
uint32_t unk00;
// 04
uint32_t log2_max_frame_num_minus4; // 04 checked
uint32_t pic_order_cnt_type; // 08 checked
uint32_t log2_max_pic_order_cnt_lsb_minus4; // 0c checked
uint32_t delta_pic_order_always_zero_flag; // 10, or unknown
uint32_t frame_mbs_only_flag; // 14, always 1?
uint32_t direct_8x8_inference_flag; // 18, always 1?
uint32_t width_mb; // 1c checked
uint32_t height_mb; // 20 checked
// 24
//struct picparm2
uint32_t entropy_coding_mode_flag; // 00, checked
uint32_t pic_order_present_flag; // 04 checked
uint32_t unk; // 08 seems to be 0?
uint32_t pad1; // 0c seems to be 0?
uint32_t pad2; // 10 always 0 ?
uint32_t num_ref_idx_l0_active_minus1; // 14 always 0?
uint32_t num_ref_idx_l1_active_minus1; // 18 always 0?
uint32_t weighted_pred_flag; // 1c checked
uint32_t weighted_bipred_idc; // 20 checked
uint32_t pic_init_qp_minus26; // 24 checked
uint32_t deblocking_filter_control_present_flag; // 28 always 1?
uint32_t redundant_pic_cnt_present_flag; // 2c always 0?
uint32_t transform_8x8_mode_flag; // 30 checked
uint32_t mb_adaptive_frame_field_flag; // 34 checked-ish
uint8_t field_pic_flag; // 38 checked
uint8_t bottom_field_flag; // 39 checked
uint8_t real_pad[0x1b]; // XX why?
uint32_t frame_mbs_only_flag; // 14, always 1?
uint32_t direct_8x8_inference_flag; // 18, always 1?
uint32_t width_mb; // 1c checked
uint32_t height_mb; // 20 checked
// 24
//struct picparm2
uint32_t entropy_coding_mode_flag; // 00, checked
uint32_t pic_order_present_flag; // 04 checked
uint32_t unk; // 08 seems to be 0?
uint32_t pad1; // 0c seems to be 0?
uint32_t pad2; // 10 always 0 ?
uint32_t num_ref_idx_l0_active_minus1; // 14 always 0?
uint32_t num_ref_idx_l1_active_minus1; // 18 always 0?
uint32_t weighted_pred_flag; // 1c checked
uint32_t weighted_bipred_idc; // 20 checked
uint32_t pic_init_qp_minus26; // 24 checked
uint32_t deblocking_filter_control_present_flag; // 28 always 1?
uint32_t redundant_pic_cnt_present_flag; // 2c always 0?
uint32_t transform_8x8_mode_flag; // 30 checked
uint32_t mb_adaptive_frame_field_flag; // 34 checked-ish
uint8_t field_pic_flag; // 38 checked
uint8_t bottom_field_flag; // 39 checked
uint8_t real_pad[0x1b]; // XX why?
};
static uint32_t

224
src/gallium/drivers/nouveau/nouveau_vp3_video_vp.c
View File

@ -23,147 +23,147 @@
#include "nouveau_vp3_video.h"
struct mpeg12_picparm_vp {
uint16_t width; // 00 in mb units
uint16_t height; // 02 in mb units
uint16_t width; // 00 in mb units
uint16_t height; // 02 in mb units
uint32_t unk04; // 04 stride for Y?
uint32_t unk08; // 08 stride for CbCr?
uint32_t unk04; // 04 stride for Y?
uint32_t unk08; // 08 stride for CbCr?
uint32_t ofs[6]; // 1c..20 ofs
uint32_t bucket_size; // 24
uint32_t inter_ring_data_size; // 28
uint16_t unk2c; // 2c
uint16_t alternate_scan; // 2e
uint16_t unk30; // 30 not seen set yet
uint16_t picture_structure; // 32
uint16_t pad2[3];
uint16_t unk3a; // 3a set on I frame?
uint32_t ofs[6]; // 1c..20 ofs
uint32_t bucket_size; // 24
uint32_t inter_ring_data_size; // 28
uint16_t unk2c; // 2c
uint16_t alternate_scan; // 2e
uint16_t unk30; // 30 not seen set yet
uint16_t picture_structure; // 32
uint16_t pad2[3];
uint16_t unk3a; // 3a set on I frame?
uint32_t f_code[4]; // 3c
uint32_t picture_coding_type; // 4c
uint32_t intra_dc_precision; // 50
uint32_t q_scale_type; // 54
uint32_t top_field_first; // 58
uint32_t full_pel_forward_vector; // 5c
uint32_t full_pel_backward_vector; // 60
uint8_t intra_quantizer_matrix[0x40]; // 64
uint8_t non_intra_quantizer_matrix[0x40]; // a4
uint32_t f_code[4]; // 3c
uint32_t picture_coding_type; // 4c
uint32_t intra_dc_precision; // 50
uint32_t q_scale_type; // 54
uint32_t top_field_first; // 58
uint32_t full_pel_forward_vector; // 5c
uint32_t full_pel_backward_vector; // 60
uint8_t intra_quantizer_matrix[0x40]; // 64
uint8_t non_intra_quantizer_matrix[0x40]; // a4
};
struct mpeg4_picparm_vp {
uint32_t width; // 00 in normal units
uint32_t height; // 04 in normal units
uint32_t unk08; // stride 1
uint32_t unk0c; // stride 2
uint32_t ofs[6]; // 10..24 ofs
uint32_t bucket_size; // 28
uint32_t pad1; // 2c, pad
uint32_t pad2; // 30
uint32_t inter_ring_data_size; // 34
uint32_t width; // 00 in normal units
uint32_t height; // 04 in normal units
uint32_t unk08; // stride 1
uint32_t unk0c; // stride 2
uint32_t ofs[6]; // 10..24 ofs
uint32_t bucket_size; // 28
uint32_t pad1; // 2c, pad
uint32_t pad2; // 30
uint32_t inter_ring_data_size; // 34
uint32_t trd[2]; // 38, 3c
uint32_t trb[2]; // 40, 44
uint32_t u48; // XXX codec selection? Should test with different values of VdpDecoderProfile
uint16_t f_code_fw; // 4c
uint16_t f_code_bw; // 4e
uint8_t interlaced; // 50
uint32_t trd[2]; // 38, 3c
uint32_t trb[2]; // 40, 44
uint32_t u48; // XXX codec selection? Should test with different values of VdpDecoderProfile
uint16_t f_code_fw; // 4c
uint16_t f_code_bw; // 4e
uint8_t interlaced; // 50
uint8_t quant_type; // bool, written to 528
uint8_t quarter_sample; // bool, written to 548
uint8_t short_video_header; // bool, negated written to 528 shifted by 1
uint8_t u54; // bool, written to 0x740
uint8_t vop_coding_type; // 55
uint8_t rounding_control; // 56
uint8_t alternate_vertical_scan_flag; // 57 bool
uint8_t top_field_first; // bool, written to vuc
uint8_t quant_type; // bool, written to 528
uint8_t quarter_sample; // bool, written to 548
uint8_t short_video_header; // bool, negated written to 528 shifted by 1
uint8_t u54; // bool, written to 0x740
uint8_t vop_coding_type; // 55
uint8_t rounding_control; // 56
uint8_t alternate_vertical_scan_flag; // 57 bool
uint8_t top_field_first; // bool, written to vuc
uint8_t pad4[3]; // 59, 5a, 5b, contains garbage on blob
uint8_t pad4[3]; // 59, 5a, 5b, contains garbage on blob
uint32_t intra[0x10]; // 5c
uint32_t non_intra[0x10]; // 9c
uint32_t pad5[0x10]; // bc what does this do?
// udc..uff pad?
uint32_t intra[0x10]; // 5c
uint32_t non_intra[0x10]; // 9c
uint32_t pad5[0x10]; // bc what does this do?
// udc..uff pad?
};
// Full version, with data pumped from BSP
struct vc1_picparm_vp {
uint32_t bucket_size; // 00
uint32_t pad; // 04
uint32_t bucket_size; // 00
uint32_t pad; // 04
uint32_t inter_ring_data_size; // 08
uint32_t unk0c; // stride 1
uint32_t unk10; // stride 2
uint32_t ofs[6]; // 14..28 ofs
uint32_t inter_ring_data_size; // 08
uint32_t unk0c; // stride 1
uint32_t unk10; // stride 2
uint32_t ofs[6]; // 14..28 ofs
uint16_t width; // 2c
uint16_t height; // 2e
uint16_t width; // 2c
uint16_t height; // 2e
uint8_t profile; // 30 0 = simple, 1 = main, 2 = advanced
uint8_t loopfilter; // 31 written into vuc
uint8_t fastuvmc; // 32, written into vuc
uint8_t dquant; // 33
uint8_t profile; // 30 0 = simple, 1 = main, 2 = advanced
uint8_t loopfilter; // 31 written into vuc
uint8_t fastuvmc; // 32, written into vuc
uint8_t dquant; // 33
uint8_t overlap; // 34
uint8_t quantizer; // 35
uint8_t u36; // 36, bool
uint8_t pad2; // 37, to align to 0x38
uint8_t overlap; // 34
uint8_t quantizer; // 35
uint8_t u36; // 36, bool
uint8_t pad2; // 37, to align to 0x38
};
struct h264_picparm_vp { // 700..a00
uint16_t width, height;
uint32_t stride1, stride2; // 04 08
uint32_t ofs[6]; // 0c..24 in-image offset
uint16_t width, height;
uint32_t stride1, stride2; // 04 08
uint32_t ofs[6]; // 0c..24 in-image offset
uint32_t tmp_stride;
uint32_t bucket_size; // 28 bucket size
uint32_t inter_ring_data_size; // 2c
uint32_t tmp_stride;
uint32_t bucket_size; // 28 bucket size
uint32_t inter_ring_data_size; // 2c
unsigned mb_adaptive_frame_field_flag : 1; // 0
unsigned direct_8x8_inference_flag : 1; // 1 0x02: into vuc ofs 56
unsigned weighted_pred_flag : 1; // 2 0x04
unsigned constrained_intra_pred_flag : 1; // 3 0x08: into vuc ofs 68
unsigned is_reference : 1; // 4
unsigned interlace : 1; // 5 field_pic_flag
unsigned bottom_field_flag : 1; // 6
unsigned second_field : 1; // 7 0x80: nfi yet
unsigned mb_adaptive_frame_field_flag : 1; // 0
unsigned direct_8x8_inference_flag : 1; // 1 0x02: into vuc ofs 56
unsigned weighted_pred_flag : 1; // 2 0x04
unsigned constrained_intra_pred_flag : 1; // 3 0x08: into vuc ofs 68
unsigned is_reference : 1; // 4
unsigned interlace : 1; // 5 field_pic_flag
unsigned bottom_field_flag : 1; // 6
unsigned second_field : 1; // 7 0x80: nfi yet
signed log2_max_frame_num_minus4 : 4; // 31 0..3
unsigned chroma_format_idc : 2; // 31 4..5
unsigned pic_order_cnt_type : 2; // 31 6..7
signed pic_init_qp_minus26 : 6; // 32 0..5
signed chroma_qp_index_offset : 5; // 32 6..10
signed second_chroma_qp_index_offset : 5; // 32 11..15
signed log2_max_frame_num_minus4 : 4; // 31 0..3
unsigned chroma_format_idc : 2; // 31 4..5
unsigned pic_order_cnt_type : 2; // 31 6..7
signed pic_init_qp_minus26 : 6; // 32 0..5
signed chroma_qp_index_offset : 5; // 32 6..10
signed second_chroma_qp_index_offset : 5; // 32 11..15
unsigned weighted_bipred_idc : 2; // 34 0..1
unsigned fifo_dec_index : 7; // 34 2..8
unsigned tmp_idx : 5; // 34 9..13
unsigned frame_number : 16; // 34 14..29
unsigned u34_3030 : 1; // 34 30..30 pp.u34[30:30]
unsigned u34_3131 : 1; // 34 31..31 pad?
unsigned weighted_bipred_idc : 2; // 34 0..1
unsigned fifo_dec_index : 7; // 34 2..8
unsigned tmp_idx : 5; // 34 9..13
unsigned frame_number : 16; // 34 14..29
unsigned u34_3030 : 1; // 34 30..30 pp.u34[30:30]
unsigned u34_3131 : 1; // 34 31..31 pad?
uint32_t field_order_cnt[2]; // 38, 3c
uint32_t field_order_cnt[2]; // 38, 3c
struct { // 40
unsigned fifo_idx : 7; // 00 0..6
unsigned tmp_idx : 5; // 00 7..11
unsigned top_is_reference : 1; // 00 12
unsigned bottom_is_reference : 1; // 00 13
unsigned is_long_term : 1; // 00 14
unsigned notseenyet : 1; // 00 15 pad?
unsigned field_pic_flag : 1; // 00 16
unsigned top_field_marking : 4; // 00 17..20
unsigned bottom_field_marking : 4; // 00 21..24
unsigned pad : 7; // 00 d25..31
struct { // 40
unsigned fifo_idx : 7; // 00 0..6
unsigned tmp_idx : 5; // 00 7..11
unsigned top_is_reference : 1; // 00 12
unsigned bottom_is_reference : 1; // 00 13
unsigned is_long_term : 1; // 00 14
unsigned notseenyet : 1; // 00 15 pad?
unsigned field_pic_flag : 1; // 00 16
unsigned top_field_marking : 4; // 00 17..20
unsigned bottom_field_marking : 4; // 00 21..24
unsigned pad : 7; // 00 d25..31
uint32_t field_order_cnt[2]; // 04,08
uint32_t frame_idx; // 0c
} refs[0x10];
uint32_t field_order_cnt[2]; // 04,08
uint32_t frame_idx; // 0c
} refs[0x10];
uint8_t m4x4[6][16]; // 140
uint8_t m8x8[2][64]; // 1a0
uint32_t u220; // 220 number of extra reorder_list to append?
uint8_t u224[0x20]; // 224..244 reorder_list append ?
uint8_t nfi244[0xb0]; // add some pad to make sure nulls are read
uint8_t m4x4[6][16]; // 140
uint8_t m8x8[2][64]; // 1a0
uint32_t u220; // 220 number of extra reorder_list to append?
uint8_t u224[0x20]; // 224..244 reorder_list append ?
uint8_t nfi244[0xb0]; // add some pad to make sure nulls are read
};
static void

20
src/gallium/drivers/nouveau/nouveau_winsys.h
View File

@ -65,18 +65,18 @@ PUSH_KICK(struct nouveau_pushbuf *push)
static inline uint32_t
nouveau_screen_transfer_flags(unsigned pipe)
{
uint32_t flags = 0;
uint32_t flags = 0;
if (!(pipe & PIPE_TRANSFER_UNSYNCHRONIZED)) {
if (pipe & PIPE_TRANSFER_READ)
flags |= NOUVEAU_BO_RD;
if (pipe & PIPE_TRANSFER_WRITE)
flags |= NOUVEAU_BO_WR;
if (pipe & PIPE_TRANSFER_DONTBLOCK)
flags |= NOUVEAU_BO_NOBLOCK;
}
if (!(pipe & PIPE_TRANSFER_UNSYNCHRONIZED)) {
if (pipe & PIPE_TRANSFER_READ)
flags |= NOUVEAU_BO_RD;
if (pipe & PIPE_TRANSFER_WRITE)
flags |= NOUVEAU_BO_WR;
if (pipe & PIPE_TRANSFER_DONTBLOCK)
flags |= NOUVEAU_BO_NOBLOCK;
}
return flags;
return flags;
}
extern struct pipe_screen *

8
src/gallium/drivers/nouveau/nv50/nv50_resource.c
View File

@ -32,8 +32,8 @@ nv50_resource_from_handle(struct pipe_screen * screen,
struct pipe_surface *
nv50_surface_from_buffer(struct pipe_context *pipe,
struct pipe_resource *pbuf,
const struct pipe_surface *templ)
struct pipe_resource *pbuf,
const struct pipe_surface *templ)
{
struct nv50_surface *sf = CALLOC_STRUCT(nv50_surface);
if (!sf)
@ -65,8 +65,8 @@ nv50_surface_from_buffer(struct pipe_context *pipe,
static struct pipe_surface *
nv50_surface_create(struct pipe_context *pipe,
struct pipe_resource *pres,
const struct pipe_surface *templ)
struct pipe_resource *pres,
const struct pipe_surface *templ)
{
/* surfaces are assumed to be miptrees all over the place. */
assert(pres->target != PIPE_BUFFER);

2
src/gallium/drivers/nouveau/nv50/nv50_surface.c
View File

@ -274,7 +274,7 @@ nv50_resource_copy_region(struct pipe_context *pipe,
static void
nv50_clear_render_target(struct pipe_context *pipe,
struct pipe_surface *dst,
const union pipe_color_union *color,
const union pipe_color_union *color,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height)
{

46
src/gallium/drivers/nouveau/nv50/nv98_video_vp.c
View File

@ -27,33 +27,33 @@
static void dump_comm_vp(struct nouveau_vp3_decoder *dec, struct comm *comm, u32 comm_seq,
struct nouveau_bo *inter_bo, unsigned slice_size)
{
unsigned i, idx = comm->pvp_cur_index & 0xf;
debug_printf("Status: %08x, stage: %08x\n", comm->status_vp[idx], comm->pvp_stage);
unsigned i, idx = comm->pvp_cur_index & 0xf;
debug_printf("Status: %08x, stage: %08x\n", comm->status_vp[idx], comm->pvp_stage);
#if 0
debug_printf("Acked byte ofs: %x, bsp byte ofs: %x\n", comm->acked_byte_ofs, comm->byte_ofs);
debug_printf("Irq/parse indexes: %i %i\n", comm->irq_index, comm->parse_endpos_index);
debug_printf("Acked byte ofs: %x, bsp byte ofs: %x\n", comm->acked_byte_ofs, comm->byte_ofs);
debug_printf("Irq/parse indexes: %i %i\n", comm->irq_index, comm->parse_endpos_index);
for (i = 0; i != comm->irq_index; ++i)
debug_printf("irq[%i] = { @ %08x -> %04x }\n", i, comm->irq_pos[i], comm->irq_470[i]);
for (i = 0; i != comm->parse_endpos_index; ++i)
debug_printf("parse_endpos[%i] = { @ %08x}\n", i, comm->parse_endpos[i]);
for (i = 0; i != comm->irq_index; ++i)
debug_printf("irq[%i] = { @ %08x -> %04x }\n", i, comm->irq_pos[i], comm->irq_470[i]);
for (i = 0; i != comm->parse_endpos_index; ++i)
debug_printf("parse_endpos[%i] = { @ %08x}\n", i, comm->parse_endpos[i]);
#endif
debug_printf("mb_y = %u\n", comm->mb_y[idx]);
if (comm->status_vp[idx] <= 1)
return;
debug_printf("mb_y = %u\n", comm->mb_y[idx]);
if (comm->status_vp[idx] <= 1)
return;
if ((comm->pvp_stage & 0xff) != 0xff) {
unsigned *map;
int ret = nouveau_bo_map(inter_bo, NOUVEAU_BO_RD|NOUVEAU_BO_NOBLOCK, dec->client);
assert(ret >= 0);
map = inter_bo->map;
for (i = 0; i < comm->byte_ofs + slice_size; i += 0x10) {
debug_printf("%05x: %08x %08x %08x %08x\n", i, map[i/4], map[i/4+1], map[i/4+2], map[i/4+3]);
}
munmap(inter_bo->map, inter_bo->size);
inter_bo->map = NULL;
}
assert((comm->pvp_stage & 0xff) == 0xff);
if ((comm->pvp_stage & 0xff) != 0xff) {
unsigned *map;
int ret = nouveau_bo_map(inter_bo, NOUVEAU_BO_RD|NOUVEAU_BO_NOBLOCK, dec->client);
assert(ret >= 0);
map = inter_bo->map;
for (i = 0; i < comm->byte_ofs + slice_size; i += 0x10) {
debug_printf("%05x: %08x %08x %08x %08x\n", i, map[i/4], map[i/4+1], map[i/4+2], map[i/4+3]);
}
munmap(inter_bo->map, inter_bo->size);
inter_bo->map = NULL;
}
assert((comm->pvp_stage & 0xff) == 0xff);
}
#endif

86
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
View File

@ -497,57 +497,57 @@ nvc0_clear_depth_stencil(struct pipe_context *pipe,
unsigned dstx, unsigned dsty,
unsigned width, unsigned height)
{
struct nvc0_context *nvc0 = nvc0_context(pipe);
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nv50_miptree *mt = nv50_miptree(dst->texture);
struct nv50_surface *sf = nv50_surface(dst);
uint32_t mode = 0;
int unk = mt->base.base.target == PIPE_TEXTURE_2D;
unsigned z;
struct nvc0_context *nvc0 = nvc0_context(pipe);
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nv50_miptree *mt = nv50_miptree(dst->texture);
struct nv50_surface *sf = nv50_surface(dst);
uint32_t mode = 0;
int unk = mt->base.base.target == PIPE_TEXTURE_2D;
unsigned z;
if (!PUSH_SPACE(push, 32 + sf->depth))
return;
if (!PUSH_SPACE(push, 32 + sf->depth))
return;
PUSH_REFN (push, mt->base.bo, mt->base.domain | NOUVEAU_BO_WR);
PUSH_REFN (push, mt->base.bo, mt->base.domain | NOUVEAU_BO_WR);
if (clear_flags & PIPE_CLEAR_DEPTH) {
BEGIN_NVC0(push, NVC0_3D(CLEAR_DEPTH), 1);
PUSH_DATAf(push, depth);
mode |= NVC0_3D_CLEAR_BUFFERS_Z;
}
if (clear_flags & PIPE_CLEAR_DEPTH) {
BEGIN_NVC0(push, NVC0_3D(CLEAR_DEPTH), 1);
PUSH_DATAf(push, depth);
mode |= NVC0_3D_CLEAR_BUFFERS_Z;
}
if (clear_flags & PIPE_CLEAR_STENCIL) {
BEGIN_NVC0(push, NVC0_3D(CLEAR_STENCIL), 1);
PUSH_DATA (push, stencil & 0xff);
mode |= NVC0_3D_CLEAR_BUFFERS_S;
}
if (clear_flags & PIPE_CLEAR_STENCIL) {
BEGIN_NVC0(push, NVC0_3D(CLEAR_STENCIL), 1);
PUSH_DATA (push, stencil & 0xff);
mode |= NVC0_3D_CLEAR_BUFFERS_S;
}
BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
PUSH_DATA (push, ( width << 16) | dstx);
PUSH_DATA (push, (height << 16) | dsty);
BEGIN_NVC0(push, NVC0_3D(SCREEN_SCISSOR_HORIZ), 2);
PUSH_DATA (push, ( width << 16) | dstx);
PUSH_DATA (push, (height << 16) | dsty);
BEGIN_NVC0(push, NVC0_3D(ZETA_ADDRESS_HIGH), 5);
PUSH_DATAh(push, mt->base.address + sf->offset);
PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nvc0_format_table[dst->format].rt);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);
BEGIN_NVC0(push, NVC0_3D(ZETA_ENABLE), 1);
PUSH_DATA (push, 1);
BEGIN_NVC0(push, NVC0_3D(ZETA_HORIZ), 3);
PUSH_DATA (push, sf->width);
PUSH_DATA (push, sf->height);
PUSH_DATA (push, (unk << 16) | (dst->u.tex.first_layer + sf->depth));
BEGIN_NVC0(push, NVC0_3D(ZETA_BASE_LAYER), 1);
PUSH_DATA (push, dst->u.tex.first_layer);
BEGIN_NVC0(push, NVC0_3D(ZETA_ADDRESS_HIGH), 5);
PUSH_DATAh(push, mt->base.address + sf->offset);
PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nvc0_format_table[dst->format].rt);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);
BEGIN_NVC0(push, NVC0_3D(ZETA_ENABLE), 1);
PUSH_DATA (push, 1);
BEGIN_NVC0(push, NVC0_3D(ZETA_HORIZ), 3);
PUSH_DATA (push, sf->width);
PUSH_DATA (push, sf->height);
PUSH_DATA (push, (unk << 16) | (dst->u.tex.first_layer + sf->depth));
BEGIN_NVC0(push, NVC0_3D(ZETA_BASE_LAYER), 1);
PUSH_DATA (push, dst->u.tex.first_layer);
BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth);
for (z = 0; z < sf->depth; ++z) {
PUSH_DATA (push, mode |
(z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
}
BEGIN_NIC0(push, NVC0_3D(CLEAR_BUFFERS), sf->depth);
for (z = 0; z < sf->depth; ++z) {
PUSH_DATA (push, mode |
(z << NVC0_3D_CLEAR_BUFFERS_LAYER__SHIFT));
}
nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
nvc0->dirty |= NVC0_NEW_FRAMEBUFFER;
}
void

46
src/gallium/drivers/nouveau/nvc0/nvc0_video_vp.c
View File

@ -27,33 +27,33 @@
static void dump_comm_vp(struct nouveau_vp3_decoder *dec, struct comm *comm, u32 comm_seq,
struct nouveau_bo *inter_bo, unsigned slice_size)
{
unsigned i, idx = comm->pvp_cur_index & 0xf;
debug_printf("Status: %08x, stage: %08x\n", comm->status_vp[idx], comm->pvp_stage);
unsigned i, idx = comm->pvp_cur_index & 0xf;
debug_printf("Status: %08x, stage: %08x\n", comm->status_vp[idx], comm->pvp_stage);
#if 0
debug_printf("Acked byte ofs: %x, bsp byte ofs: %x\n", comm->acked_byte_ofs, comm->byte_ofs);
debug_printf("Irq/parse indexes: %i %i\n", comm->irq_index, comm->parse_endpos_index);
debug_printf("Acked byte ofs: %x, bsp byte ofs: %x\n", comm->acked_byte_ofs, comm->byte_ofs);
debug_printf("Irq/parse indexes: %i %i\n", comm->irq_index, comm->parse_endpos_index);
for (i = 0; i != comm->irq_index; ++i)
debug_printf("irq[%i] = { @ %08x -> %04x }\n", i, comm->irq_pos[i], comm->irq_470[i]);
for (i = 0; i != comm->parse_endpos_index; ++i)
debug_printf("parse_endpos[%i] = { @ %08x}\n", i, comm->parse_endpos[i]);
for (i = 0; i != comm->irq_index; ++i)
debug_printf("irq[%i] = { @ %08x -> %04x }\n", i, comm->irq_pos[i], comm->irq_470[i]);
for (i = 0; i != comm->parse_endpos_index; ++i)
debug_printf("parse_endpos[%i] = { @ %08x}\n", i, comm->parse_endpos[i]);
#endif
debug_printf("mb_y = %u\n", comm->mb_y[idx]);
if (comm->status_vp[idx] <= 1)
return;
debug_printf("mb_y = %u\n", comm->mb_y[idx]);
if (comm->status_vp[idx] <= 1)
return;
if ((comm->pvp_stage & 0xff) != 0xff) {
unsigned *map;
int ret = nouveau_bo_map(inter_bo, NOUVEAU_BO_RD|NOUVEAU_BO_NOBLOCK, dec->client);
assert(ret >= 0);
map = inter_bo->map;
for (i = 0; i < comm->byte_ofs + slice_size; i += 0x10) {
debug_printf("%05x: %08x %08x %08x %08x\n", i, map[i/4], map[i/4+1], map[i/4+2], map[i/4+3]);
}
munmap(inter_bo->map, inter_bo->size);
inter_bo->map = NULL;
}
assert((comm->pvp_stage & 0xff) == 0xff);
if ((comm->pvp_stage & 0xff) != 0xff) {
unsigned *map;
int ret = nouveau_bo_map(inter_bo, NOUVEAU_BO_RD|NOUVEAU_BO_NOBLOCK, dec->client);
assert(ret >= 0);
map = inter_bo->map;
for (i = 0; i < comm->byte_ofs + slice_size; i += 0x10) {
debug_printf("%05x: %08x %08x %08x %08x\n", i, map[i/4], map[i/4+1], map[i/4+2], map[i/4+3]);
}
munmap(inter_bo->map, inter_bo->size);
inter_bo->map = NULL;
}
assert((comm->pvp_stage & 0xff) == 0xff);
}
#endif