svga: whitespace/formatting fixes in svga_state_rss.c
Reviewed-by: Neha Bhende <bhenden@vmware.com> Reviewed-by: Charmaine Lee <charmainel@vmware.com>
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@ -66,9 +66,7 @@ do { \
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static inline void
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static inline void
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svga_queue_rs( struct rs_queue *q,
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svga_queue_rs(struct rs_queue *q, unsigned rss, unsigned value)
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unsigned rss,
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unsigned value )
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{
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{
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q->rs[q->rs_count].state = rss;
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q->rs[q->rs_count].state = rss;
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q->rs[q->rs_count].uintValue = value;
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q->rs[q->rs_count].uintValue = value;
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@ -127,15 +125,13 @@ emit_rss_vgpu9(struct svga_context *svga, unsigned dirty)
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const struct svga_depth_stencil_state *curr = svga->curr.depth;
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const struct svga_depth_stencil_state *curr = svga->curr.depth;
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const struct svga_rasterizer_state *rast = svga->curr.rast;
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const struct svga_rasterizer_state *rast = svga->curr.rast;
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if (!curr->stencil[0].enabled)
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if (!curr->stencil[0].enabled) {
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{
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/* Stencil disabled
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/* Stencil disabled
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*/
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*/
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EMIT_RS(svga, FALSE, STENCILENABLE, fail);
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EMIT_RS(svga, FALSE, STENCILENABLE, fail);
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EMIT_RS(svga, FALSE, STENCILENABLE2SIDED, fail);
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EMIT_RS(svga, FALSE, STENCILENABLE2SIDED, fail);
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}
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}
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else if (curr->stencil[0].enabled && !curr->stencil[1].enabled)
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else if (curr->stencil[0].enabled && !curr->stencil[1].enabled) {
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{
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/* Regular stencil
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/* Regular stencil
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*/
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*/
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EMIT_RS(svga, TRUE, STENCILENABLE, fail);
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EMIT_RS(svga, TRUE, STENCILENABLE, fail);
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@ -149,8 +145,7 @@ emit_rss_vgpu9(struct svga_context *svga, unsigned dirty)
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EMIT_RS(svga, curr->stencil_mask, STENCILMASK, fail);
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EMIT_RS(svga, curr->stencil_mask, STENCILMASK, fail);
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EMIT_RS(svga, curr->stencil_writemask, STENCILWRITEMASK, fail);
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EMIT_RS(svga, curr->stencil_writemask, STENCILWRITEMASK, fail);
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}
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}
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else
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else {
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{
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int cw, ccw;
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int cw, ccw;
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/* Hardware frontwinding is always CW, so if ours is also CW,
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/* Hardware frontwinding is always CW, so if ours is also CW,
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@ -202,8 +197,7 @@ emit_rss_vgpu9(struct svga_context *svga, unsigned dirty)
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EMIT_RS(svga, svga->curr.stencil_ref.ref_value[0], STENCILREF, fail);
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EMIT_RS(svga, svga->curr.stencil_ref.ref_value[0], STENCILREF, fail);
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}
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}
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if (dirty & (SVGA_NEW_RAST | SVGA_NEW_NEED_PIPELINE))
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if (dirty & (SVGA_NEW_RAST | SVGA_NEW_NEED_PIPELINE)) {
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{
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const struct svga_rasterizer_state *curr = svga->curr.rast;
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const struct svga_rasterizer_state *curr = svga->curr.rast;
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unsigned cullmode = curr->cullmode;
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unsigned cullmode = curr->cullmode;
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@ -239,8 +233,9 @@ emit_rss_vgpu9(struct svga_context *svga, unsigned dirty)
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EMIT_RS_FLOAT(svga, curr->linewidth, LINEWIDTH, fail);
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EMIT_RS_FLOAT(svga, curr->linewidth, LINEWIDTH, fail);
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}
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}
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if (dirty & (SVGA_NEW_RAST | SVGA_NEW_FRAME_BUFFER | SVGA_NEW_NEED_PIPELINE))
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if (dirty & (SVGA_NEW_RAST |
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{
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SVGA_NEW_FRAME_BUFFER |
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SVGA_NEW_NEED_PIPELINE)) {
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const struct svga_rasterizer_state *curr = svga->curr.rast;
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const struct svga_rasterizer_state *curr = svga->curr.rast;
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float slope = 0.0;
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float slope = 0.0;
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float bias = 0.0;
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float bias = 0.0;
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@ -304,6 +299,7 @@ fail:
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return PIPE_ERROR_OUT_OF_MEMORY;
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return PIPE_ERROR_OUT_OF_MEMORY;
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}
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}
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/** Returns a non-culling rasterizer state object to be used with
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/** Returns a non-culling rasterizer state object to be used with
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* point sprite.
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* point sprite.
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*/
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*/
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