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etnaviv: add missing formats 

Add missing texture/render formats supported by hardware.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This commit is contained in:
Jonathan Marek 2019-12-08 11:52:32 -05:00
parent d30499a3c8
commit 64c7cdcae5
2 changed files with 60 additions and 28 deletions
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60
src/gallium/drivers/etnaviv/etnaviv_format.c
View File

@ -83,10 +83,10 @@ struct etna_format {
static struct etna_format formats[PIPE_FORMAT_COUNT] = {
/* 8-bit */
VT(R8_UNORM, UNSIGNED_BYTE, L8, NONE),
V_(R8_SNORM, BYTE, NONE),
V_(R8_UINT, BYTE_I, NONE),
V_(R8_SINT, BYTE_I, NONE),
VT(R8_UNORM, UNSIGNED_BYTE, L8, R8),
VT(R8_SNORM, BYTE, EXT_R8_SNORM | EXT_FORMAT, NONE),
VT(R8_UINT, BYTE_I, EXT_R8I | EXT_FORMAT, R8I),
VT(R8_SINT, BYTE_I, EXT_R8I | EXT_FORMAT, R8I),
V_(R8_USCALED, UNSIGNED_BYTE, NONE),
V_(R8_SSCALED, BYTE, NONE),
@ -97,11 +97,11 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
/* 16-bit */
V_(R16_UNORM, UNSIGNED_SHORT, NONE),
V_(R16_SNORM, SHORT, NONE),
V_(R16_UINT, SHORT_I, NONE),
V_(R16_SINT, SHORT_I, NONE),
VT(R16_UINT, SHORT_I, EXT_R16I | EXT_FORMAT, R16I),
VT(R16_SINT, SHORT_I, EXT_R16I | EXT_FORMAT, R16I),
V_(R16_USCALED, UNSIGNED_SHORT, NONE),
V_(R16_SSCALED, SHORT, NONE),
V_(R16_FLOAT, HALF_FLOAT, NONE),
VT(R16_FLOAT, HALF_FLOAT, EXT_R16F | EXT_FORMAT, R16F),
_T(B4G4R4A4_UNORM, A4R4G4B4, A4R4G4B4),
_T(B4G4R4X4_UNORM, X4R4G4B4, X4R4G4B4),
@ -113,10 +113,10 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
_T(B5G5R5A1_UNORM, A1R5G5B5, A1R5G5B5),
_T(B5G5R5X1_UNORM, X1R5G5B5, X1R5G5B5),
VT(R8G8_UNORM, UNSIGNED_BYTE, EXT_G8R8 | EXT_FORMAT, NONE),
V_(R8G8_SNORM, BYTE, NONE),
V_(R8G8_UINT, BYTE_I, NONE),
V_(R8G8_SINT, BYTE_I, NONE),
VT(R8G8_UNORM, UNSIGNED_BYTE, EXT_G8R8 | EXT_FORMAT, G8R8),
VT(R8G8_SNORM, BYTE, EXT_G8R8_SNORM | EXT_FORMAT, NONE),
VT(R8G8_UINT, BYTE_I, EXT_G8R8I | EXT_FORMAT, G8R8I),
VT(R8G8_SINT, BYTE_I, EXT_G8R8I | EXT_FORMAT, G8R8I),
V_(R8G8_USCALED, UNSIGNED_BYTE, NONE),
V_(R8G8_SSCALED, BYTE, NONE),
@ -131,42 +131,48 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
/* 32-bit */
V_(R32_UNORM, UNSIGNED_INT, NONE),
V_(R32_SNORM, INT, NONE),
V_(R32_SINT, FLOAT, NONE),
V_(R32_UINT, FLOAT, NONE),
VT(R32_SINT, FLOAT, EXT_R32F | EXT_FORMAT, R32F),
VT(R32_UINT, FLOAT, EXT_R32F | EXT_FORMAT, R32F),
V_(R32_USCALED, UNSIGNED_INT, NONE),
V_(R32_SSCALED, INT, NONE),
V_(R32_FLOAT, FLOAT, NONE),
VT(R32_FLOAT, FLOAT, EXT_R32F | EXT_FORMAT, R32F),
V_(R32_FIXED, FIXED, NONE),
V_(R16G16_UNORM, UNSIGNED_SHORT, NONE),
V_(R16G16_SNORM, SHORT, NONE),
V_(R16G16_UINT, SHORT_I, NONE),
V_(R16G16_SINT, SHORT_I, NONE),
VT(R16G16_UINT, SHORT_I, EXT_G16R16I | EXT_FORMAT, G16R16I),
VT(R16G16_SINT, SHORT_I, EXT_G16R16I | EXT_FORMAT, G16R16I),
V_(R16G16_USCALED, UNSIGNED_SHORT, NONE),
V_(R16G16_SSCALED, SHORT, NONE),
V_(R16G16_FLOAT, HALF_FLOAT, NONE),
VT(R16G16_FLOAT, HALF_FLOAT, EXT_G16R16F | EXT_FORMAT, G16R16F),
V_(A8B8G8R8_UNORM, UNSIGNED_BYTE, NONE),
VT(R8G8B8A8_UNORM, UNSIGNED_BYTE, A8B8G8R8, A8B8G8R8),
V_(R8G8B8A8_SNORM, BYTE, A8B8G8R8),
VT(R8G8B8A8_SNORM, BYTE, EXT_A8B8G8R8_SNORM | EXT_FORMAT, NONE),
_T(R8G8B8X8_UNORM, X8B8G8R8, X8B8G8R8),
V_(R8G8B8A8_UINT, BYTE_I, A8B8G8R8),
V_(R8G8B8A8_SINT, BYTE_I, A8B8G8R8),
_T(R8G8B8X8_SNORM, EXT_X8B8G8R8_SNORM | EXT_FORMAT, NONE),
VT(R8G8B8A8_UINT, BYTE_I, EXT_A8B8G8R8I | EXT_FORMAT, A8B8G8R8I),
VT(R8G8B8A8_SINT, BYTE_I, EXT_A8B8G8R8I | EXT_FORMAT, A8B8G8R8I),
V_(R8G8B8A8_USCALED, UNSIGNED_BYTE, A8B8G8R8),
V_(R8G8B8A8_SSCALED, BYTE, A8B8G8R8),
_T(B8G8R8A8_UNORM, A8R8G8B8, A8R8G8B8),
_T(B8G8R8X8_UNORM, X8R8G8B8, X8R8G8B8),
V_(R10G10B10A2_UNORM, UNSIGNED_INT_2_10_10_10_REV, NONE),
VT(R10G10B10A2_UNORM, UNSIGNED_INT_2_10_10_10_REV, EXT_A2B10G10R10 | EXT_FORMAT, A2B10G10R10),
_T(R10G10B10X2_UNORM, EXT_A2B10G10R10 | EXT_FORMAT, A2B10G10R10),
V_(R10G10B10A2_SNORM, INT_2_10_10_10_REV, NONE),
_T(R10G10B10A2_UINT, EXT_A2B10G10R10UI | EXT_FORMAT, A2B10G10R10UI),
V_(R10G10B10A2_USCALED, UNSIGNED_INT_2_10_10_10_REV, NONE),
V_(R10G10B10A2_SSCALED, INT_2_10_10_10_REV, NONE),
_T(X8Z24_UNORM, D24X8, NONE),
_T(S8_UINT_Z24_UNORM, D24X8, NONE),
_T(R9G9B9E5_FLOAT, E5B9G9R9, NONE),
_T(R11G11B10_FLOAT, EXT_B10G11R11F | EXT_FORMAT, B10G11R11F),
/* 48-bit */
V_(R16G16B16_UNORM, UNSIGNED_SHORT, NONE),
V_(R16G16B16_SNORM, SHORT, NONE),
@ -179,19 +185,19 @@ static struct etna_format formats[PIPE_FORMAT_COUNT] = {
/* 64-bit */
V_(R16G16B16A16_UNORM, UNSIGNED_SHORT, NONE),
V_(R16G16B16A16_SNORM, SHORT, NONE),
V_(R16G16B16A16_UINT, SHORT_I, NONE),
V_(R16G16B16A16_SINT, SHORT_I, NONE),
VT(R16G16B16A16_UINT, SHORT_I, EXT_A16B16G16R16I | EXT_FORMAT, A16B16G16R16I),
VT(R16G16B16A16_SINT, SHORT_I, EXT_A16B16G16R16I | EXT_FORMAT, A16B16G16R16I),
V_(R16G16B16A16_USCALED, UNSIGNED_SHORT, NONE),
V_(R16G16B16A16_SSCALED, SHORT, NONE),
V_(R16G16B16A16_FLOAT, HALF_FLOAT, NONE),
VT(R16G16B16A16_FLOAT, HALF_FLOAT, EXT_A16B16G16R16F | EXT_FORMAT, A16B16G16R16F),
V_(R32G32_UNORM, UNSIGNED_INT, NONE),
V_(R32G32_SNORM, INT, NONE),
V_(R32G32_UINT, FLOAT, NONE),
V_(R32G32_SINT, FLOAT, NONE),
VT(R32G32_UINT, FLOAT, EXT_G32R32F | EXT_FORMAT, G32R32F),
VT(R32G32_SINT, FLOAT, EXT_G32R32F | EXT_FORMAT, G32R32F),
V_(R32G32_USCALED, UNSIGNED_INT, NONE),
V_(R32G32_SSCALED, INT, NONE),
V_(R32G32_FLOAT, FLOAT, NONE),
VT(R32G32_FLOAT, FLOAT, EXT_G32R32F | EXT_FORMAT, G32R32F),
V_(R32G32_FIXED, FIXED, NONE),
/* 96-bit */

28
src/gallium/drivers/etnaviv/etnaviv_screen.c
View File

@ -403,6 +403,13 @@ gpu_supports_texture_format(struct etna_screen *screen, uint32_t fmt,
supported = screen->specs.tex_astc;
}
if (util_format_is_snorm(format))
supported = VIV_FEATURE(screen, chipMinorFeatures2, HALTI1);
if (util_format_is_pure_integer(format) || util_format_is_float(format))
supported = VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
if (!supported)
return false;
@ -416,7 +423,9 @@ static bool
gpu_supports_render_format(struct etna_screen *screen, enum pipe_format format,
unsigned sample_count)
{
if (translate_pe_format(format) == ETNA_NO_MATCH)
const uint32_t fmt = translate_pe_format(format);
if (fmt == ETNA_NO_MATCH)
return false;
/* Validate MSAA; number of samples must be allowed, and render target
@ -428,9 +437,26 @@ gpu_supports_render_format(struct etna_screen *screen, enum pipe_format format,
return false;
}
if (format == PIPE_FORMAT_R8_UNORM)
return VIV_FEATURE(screen, chipMinorFeatures5, HALTI5);
/* figure out 8bpp RS clear to enable these formats */
if (format == PIPE_FORMAT_R8_SINT || format == PIPE_FORMAT_R8_UINT)
return VIV_FEATURE(screen, chipMinorFeatures5, HALTI5);
if (util_format_is_srgb(format))
return VIV_FEATURE(screen, chipMinorFeatures5, HALTI3);
if (util_format_is_pure_integer(format) || util_format_is_float(format))
return VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
if (format == PIPE_FORMAT_R8G8_UNORM)
return VIV_FEATURE(screen, chipMinorFeatures4, HALTI2);
/* any other extended format is HALTI0 (only R10G10B10A2?) */
if (fmt >= PE_FORMAT_R16F)
return VIV_FEATURE(screen, chipMinorFeatures1, HALTI0);
return true;
}