From 64b75cc12e09dcdafbe205cbf355cd8dfbc7a660 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 12 May 2021 23:21:36 -0400 Subject: [PATCH] radeonsi: add a gfx10 hw bug workaround with the barrier before gs_alloc_req Fixes: 8845a23698c - amd: add NAVI10 PCI IDs Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_shader_llvm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm.c b/src/gallium/drivers/radeonsi/si_shader_llvm.c index 9ee4779473d..2679c64e17a 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm.c @@ -944,6 +944,10 @@ bool si_llvm_translate_nir(struct si_shader_context *ctx, struct si_shader *shad */ if ((ctx->stage == MESA_SHADER_VERTEX || ctx->stage == MESA_SHADER_TESS_EVAL) && shader->key.as_ngg && !shader->key.as_es && !shader->key.opt.ngg_culling) { + /* GFX10 requires a barrier before gs_alloc_req due to a hw bug. */ + if (ctx->screen->info.chip_class == GFX10) + ac_build_s_barrier(&ctx->ac); + gfx10_ngg_build_sendmsg_gs_alloc_req(ctx); /* Build the primitive export at the beginning