r600g: let radeon_winsys maintain the list of relocations
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
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9865b1ec8c
commit
638d75185e
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@ -239,6 +239,7 @@ struct r600_query {
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struct r600_context {
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struct radeon *radeon;
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struct radeon_winsys_cs *cs;
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struct r600_range *range;
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unsigned nblocks;
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struct r600_block **blocks;
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@ -250,7 +251,7 @@ struct r600_context {
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unsigned pm4_dirty_cdwords;
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unsigned ctx_pm4_ndwords;
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unsigned init_dwords;
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unsigned nreloc;
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unsigned creloc;
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struct r600_reloc *reloc;
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struct radeon_bo **bo;
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@ -986,14 +986,10 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon)
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if (r)
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goto out_err;
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ctx->cs = radeon->ws->cs_create(radeon->ws);
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/* allocate cs variables */
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ctx->nreloc = RADEON_CTX_MAX_PM4;
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ctx->reloc = calloc(ctx->nreloc, sizeof(struct r600_reloc));
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if (ctx->reloc == NULL) {
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r = -ENOMEM;
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goto out_err;
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}
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ctx->bo = calloc(ctx->nreloc, sizeof(void *));
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ctx->bo = calloc(RADEON_CTX_MAX_PM4, sizeof(void *));
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if (ctx->bo == NULL) {
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r = -ENOMEM;
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goto out_err;
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@ -1146,10 +1142,6 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr
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if (draw->indices) {
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ndwords = 11;
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/* make sure there is enough relocation space before scheduling draw */
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if (ctx->creloc >= (ctx->nreloc - 1)) {
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r600_context_flush(ctx);
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}
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}
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/* queries need some special values */
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@ -776,9 +776,9 @@ void r600_context_fini(struct r600_context *ctx)
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r600_free_resource_range(ctx, &ctx->fs_resources, ctx->num_fs_resources);
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free(ctx->range);
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free(ctx->blocks);
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free(ctx->reloc);
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free(ctx->bo);
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free(ctx->pm4);
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ctx->radeon->ws->cs_destroy(ctx->cs);
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memset(ctx, 0, sizeof(struct r600_context));
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}
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@ -912,14 +912,10 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon)
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if (r)
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goto out_err;
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ctx->cs = radeon->ws->cs_create(radeon->ws);
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/* allocate cs variables */
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ctx->nreloc = RADEON_CTX_MAX_PM4;
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ctx->reloc = calloc(ctx->nreloc, sizeof(struct r600_reloc));
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if (ctx->reloc == NULL) {
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r = -ENOMEM;
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goto out_err;
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}
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ctx->bo = calloc(ctx->nreloc, sizeof(void *));
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ctx->bo = calloc(RADEON_CTX_MAX_PM4, sizeof(void *));
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if (ctx->bo == NULL) {
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r = -ENOMEM;
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goto out_err;
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@ -1009,14 +1005,15 @@ void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
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void r600_context_get_reloc(struct r600_context *ctx, struct r600_bo *rbo)
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{
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struct radeon_bo *bo = rbo->bo;
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bo->reloc = &ctx->reloc[ctx->creloc];
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bo->reloc_id = ctx->creloc * sizeof(struct r600_reloc) / 4;
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ctx->reloc[ctx->creloc].handle = bo->handle;
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ctx->reloc[ctx->creloc].read_domain = rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM);
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ctx->reloc[ctx->creloc].write_domain = rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM);
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ctx->reloc[ctx->creloc].flags = 0;
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radeon_bo_reference(ctx->radeon, &ctx->bo[ctx->creloc], bo);
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ctx->creloc++;
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unsigned reloc_index = ctx->radeon->ws->trans_add_reloc(ctx->cs, bo->cs_buf,
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rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM),
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rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM),
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(void**)&ctx->reloc, &ctx->creloc);
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bo->reloc = (void*)1;
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bo->reloc_id = reloc_index * 4;
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radeon_bo_reference(ctx->radeon, &ctx->bo[reloc_index], bo);
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}
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void r600_context_reg(struct r600_context *ctx,
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@ -1444,10 +1441,6 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
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if (draw->indices) {
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ndwords = 11;
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/* make sure there is enough relocation space before scheduling draw */
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if (ctx->creloc >= (ctx->nreloc - 1)) {
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r600_context_flush(ctx);
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}
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}
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/* queries need some special values */
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@ -1570,6 +1563,7 @@ void r600_context_flush(struct r600_context *ctx)
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ctx->pm4_dirty_cdwords = 0;
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ctx->pm4_cdwords = 0;
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ctx->flags = 0;
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ctx->radeon->ws->cs_flush(ctx->cs, 0);
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r600_init_cs(ctx);
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@ -1601,8 +1595,7 @@ void r600_context_emit_fence(struct r600_context *ctx, struct r600_bo *fence_bo,
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{
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unsigned ndwords = 10;
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if (((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) ||
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(ctx->creloc >= (ctx->nreloc - 1))) {
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if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
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/* need to flush */
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r600_context_flush(ctx);
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}
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@ -65,6 +65,7 @@ struct r600_reg {
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struct radeon_bo {
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struct pipe_reference reference;
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struct pb_buffer *buf;
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struct radeon_winsys_cs_handle *cs_buf;
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unsigned handle;
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unsigned size;
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int map_count;
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@ -94,6 +94,7 @@ struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
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FREE(bo);
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return NULL;
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}
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bo->cs_buf = radeon->ws->buffer_get_cs_handle(bo->buf);
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bo->handle = radeon->ws->trans_get_buffer_handle(bo->buf);
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bo->size = size;
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return bo;
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@ -219,11 +219,11 @@ int radeon_get_reloc(struct radeon_cs_context *csc, struct radeon_bo *bo)
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return -1;
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}
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static void radeon_add_reloc(struct radeon_cs_context *csc,
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struct radeon_bo *bo,
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enum radeon_bo_domain rd,
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enum radeon_bo_domain wd,
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enum radeon_bo_domain *added_domains)
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static unsigned radeon_add_reloc(struct radeon_cs_context *csc,
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struct radeon_bo *bo,
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enum radeon_bo_domain rd,
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enum radeon_bo_domain wd,
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enum radeon_bo_domain *added_domains)
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{
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struct drm_radeon_cs_reloc *reloc;
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unsigned i;
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@ -233,7 +233,7 @@ static void radeon_add_reloc(struct radeon_cs_context *csc,
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reloc = csc->relocs_hashlist[hash];
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if (reloc->handle == bo->handle) {
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update_domains(reloc, rd, wd, added_domains);
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return;
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return csc->reloc_indices_hashlist[hash];
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}
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/* Hash collision, look for the BO in the list of relocs linearly. */
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@ -246,7 +246,7 @@ static void radeon_add_reloc(struct radeon_cs_context *csc,
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csc->relocs_hashlist[hash] = reloc;
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csc->reloc_indices_hashlist[hash] = i;
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/*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/
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return;
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return i;
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}
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}
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}
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@ -280,9 +280,9 @@ static void radeon_add_reloc(struct radeon_cs_context *csc,
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csc->reloc_indices_hashlist[hash] = csc->crelocs;
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csc->chunks[1].length_dw += RELOC_DWORDS;
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csc->crelocs++;
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*added_domains = rd | wd;
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return csc->crelocs++;
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}
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static void radeon_drm_cs_add_reloc(struct radeon_winsys_cs *rcs,
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@ -470,6 +470,28 @@ static boolean radeon_bo_is_referenced(struct radeon_winsys_cs *rcs,
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return radeon_bo_is_referenced_by_cs(cs, bo);
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}
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static unsigned trans_add_reloc(struct radeon_winsys_cs *rcs,
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struct radeon_winsys_cs_handle *buf,
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enum radeon_bo_domain rd,
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enum radeon_bo_domain wd,
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void **reloc_list, unsigned *reloc_count)
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{
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struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
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struct radeon_bo *bo = (struct radeon_bo*)buf;
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enum radeon_bo_domain added_domains;
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unsigned index = radeon_add_reloc(cs->csc, bo, rd, wd, &added_domains);
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if (added_domains & RADEON_DOMAIN_GTT)
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cs->csc->used_gart += bo->size;
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if (added_domains & RADEON_DOMAIN_VRAM)
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cs->csc->used_vram += bo->size;
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*reloc_list = cs->csc->relocs;
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*reloc_count = cs->csc->crelocs;
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return index;
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}
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void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws)
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{
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ws->base.cs_create = radeon_drm_cs_create;
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@ -480,4 +502,6 @@ void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws)
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ws->base.cs_flush = radeon_drm_cs_flush;
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ws->base.cs_set_flush = radeon_drm_cs_set_flush;
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ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced;
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ws->base.trans_add_reloc = trans_add_reloc;
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}
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@ -329,6 +329,11 @@ struct radeon_winsys {
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/* Transitional functions for r600g when moving to winsys/radeon */
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unsigned (*trans_get_buffer_handle)(struct pb_buffer *buf);
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unsigned (*trans_add_reloc)(struct radeon_winsys_cs *cs,
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struct radeon_winsys_cs_handle *buf,
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enum radeon_bo_domain rd,
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enum radeon_bo_domain wd,
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void **reloc_list, unsigned *reloc_count);
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};
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#endif
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