nir: add amul instruction
Used for address/offset calculation (ie. array derefs), where we can potentially use less than 32b for the multiply of array idx by element size. For backends that support `imul24`, this gives a lowering pass an easy way to find multiplies that potentially can be converted to `imul24`. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com> Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
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@ -59,7 +59,7 @@ get_block_array_index(nir_builder *b, nir_deref_instr *deref,
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} else {
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nir_ssa_def *arr_index = nir_ssa_for_src(b, deref->arr.index, 1);
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arr_index = nir_umin(b, arr_index, nir_imm_int(b, arr_size - 1));
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nir_ssa_def *arr_offset = nir_imul_imm(b, arr_index, array_elements);
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nir_ssa_def *arr_offset = nir_amul_imm(b, arr_index, array_elements);
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if (nonconst_index)
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nonconst_index = nir_iadd(b, nonconst_index, arr_offset);
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else
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@ -646,7 +646,7 @@ nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
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}
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static inline nir_ssa_def *
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nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
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_nir_mul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y, bool amul)
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{
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assert(x->bit_size <= 64);
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if (x->bit_size < 64)
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@ -658,11 +658,25 @@ nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
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return x;
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} else if (util_is_power_of_two_or_zero64(y)) {
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return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
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} else if (amul) {
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return nir_amul(build, x, nir_imm_intN_t(build, y, x->bit_size));
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} else {
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return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
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}
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}
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static inline nir_ssa_def *
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nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
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{
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return _nir_mul_imm(build, x, y, false);
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}
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static inline nir_ssa_def *
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nir_amul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
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{
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return _nir_mul_imm(build, x, y, true);
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}
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static inline nir_ssa_def *
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nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
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{
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@ -297,7 +297,7 @@ nir_build_deref_offset(nir_builder *b, nir_deref_instr *deref,
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if ((*p)->deref_type == nir_deref_type_array) {
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nir_ssa_def *index = nir_ssa_for_src(b, (*p)->arr.index, 1);
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int stride = type_get_array_stride((*p)->type, size_align);
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offset = nir_iadd(b, offset, nir_imul_imm(b, index, stride));
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offset = nir_iadd(b, offset, nir_amul_imm(b, index, stride));
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} else if ((*p)->deref_type == nir_deref_type_struct) {
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/* p starts at path[1], so this is safe */
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nir_deref_instr *parent = *(p - 1);
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@ -206,7 +206,7 @@ get_io_offset(nir_builder *b, nir_deref_instr *deref,
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unsigned size = type_size((*p)->type, bts);
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nir_ssa_def *mul =
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nir_imul_imm(b, nir_ssa_for_src(b, (*p)->arr.index, 1), size);
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nir_amul_imm(b, nir_ssa_for_src(b, (*p)->arr.index, 1), size);
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offset = nir_iadd(b, offset, mul);
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} else if ((*p)->deref_type == nir_deref_type_struct) {
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@ -1094,7 +1094,7 @@ nir_explicit_io_address_from_deref(nir_builder *b, nir_deref_instr *deref,
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nir_ssa_def *index = nir_ssa_for_src(b, deref->arr.index, 1);
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index = nir_i2i(b, index, base_addr->bit_size);
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return build_addr_iadd(b, base_addr, addr_format,
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nir_imul_imm(b, index, stride));
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nir_amul_imm(b, index, stride));
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}
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case nir_deref_type_ptr_as_array: {
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@ -1102,7 +1102,7 @@ nir_explicit_io_address_from_deref(nir_builder *b, nir_deref_instr *deref,
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index = nir_i2i(b, index, base_addr->bit_size);
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unsigned stride = nir_deref_instr_ptr_as_array_stride(deref);
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return build_addr_iadd(b, base_addr, addr_format,
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nir_imul_imm(b, index, stride));
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nir_amul_imm(b, index, stride));
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}
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case nir_deref_type_array_wildcard:
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@ -319,7 +319,7 @@ build_array_index(nir_builder *b, nir_deref_instr *deref, nir_ssa_def *base,
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deref->dest.ssa.bit_size);
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return nir_iadd(
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b, build_array_index(b, nir_deref_instr_parent(deref), base, vs_in),
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nir_imul_imm(b, index, glsl_count_attribute_slots(deref->type, vs_in)));
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nir_amul_imm(b, index, glsl_count_attribute_slots(deref->type, vs_in)));
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}
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default:
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unreachable("Invalid deref instruction type");
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@ -1047,6 +1047,18 @@ dst.z = src2.x;
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dst.w = src3.x;
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""")
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# An integer multiply instruction for address calculation. This is
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# similar to imul, except that the results are undefined in case of
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# overflow. Overflow is defined according to the size of the variable
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# being dereferenced.
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#
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# This relaxed definition, compared to imul, allows an optimization
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# pass to propagate bounds (ie, from an load/store intrinsic) to the
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# sources, such that lower precision integer multiplies can be used.
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# This is useful on hw that has 24b or perhaps 16b integer multiply
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# instructions.
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binop("amul", tint, _2src_commutative + associative, "src0 * src1")
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# ir3-specific instruction that maps directly to mul-add shift high mix,
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# (IMADSH_MIX16 i.e. ah * bl << 16 + c). It is used for lowering integer
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# multiplication (imul) on Freedreno backend..
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@ -1112,6 +1112,11 @@ optimizations.extend([
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(('isign', a), ('imin', ('imax', a, -1), 1), 'options->lower_isign'),
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(('fsign', a), ('fsub', ('b2f', ('flt', 0.0, a)), ('b2f', ('flt', a, 0.0))), 'options->lower_fsign'),
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# Address/offset calculations:
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# for now, unconditionally convert amul to imul, this will
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# change in the following patch
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(('amul', a, b), ('imul', a, b)),
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])
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# bit_size dependent lowerings
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