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freedreno/a6xx: Implement PIPE_QUERY_PRIMITIVES_GENERATED for GS 

When we don't have streamout enabled, we have to read this register to
get the number of primitives emitted.

Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
This commit is contained in:
Kristian H. Kristensen 2019-10-16 12:08:19 -07:00
parent c8e1522a50
commit 622afc8dbd
3 changed files with 68 additions and 0 deletions
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32
src/freedreno/registers/a6xx.xml
View File

@ -1372,6 +1372,38 @@ to upconvert to 32b float internally?
<reg32 offset="0x050A" name="RBBM_PERFCTR_RBBM_SEL_3"/>
<reg32 offset="0x050B" name="RBBM_PERFCTR_GPU_BUSY_MASKED"/>
<reg32 offset="0x0533" name="RBBM_ISDB_CNT"/>
<!---
This block of registers aren't tied to perf counters. They
count various geometry stats, for example number of
vertices in, number of primnitives assembled etc.
-->
<reg32 offset="0x0540" name="RBBM_PRIMCTR_0_LO"/>
<reg32 offset="0x0541" name="RBBM_PRIMCTR_0_HI"/>
<reg32 offset="0x0542" name="RBBM_PRIMCTR_1_LO"/>
<reg32 offset="0x0543" name="RBBM_PRIMCTR_1_HI"/>
<reg32 offset="0x0544" name="RBBM_PRIMCTR_2_LO"/>
<reg32 offset="0x0545" name="RBBM_PRIMCTR_2_HI"/>
<reg32 offset="0x0546" name="RBBM_PRIMCTR_3_LO"/>
<reg32 offset="0x0547" name="RBBM_PRIMCTR_3_HI"/>
<reg32 offset="0x0548" name="RBBM_PRIMCTR_4_LO"/>
<reg32 offset="0x0549" name="RBBM_PRIMCTR_4_HI"/>
<reg32 offset="0x054a" name="RBBM_PRIMCTR_5_LO"/>
<reg32 offset="0x054b" name="RBBM_PRIMCTR_5_HI"/>
<reg32 offset="0x054c" name="RBBM_PRIMCTR_6_LO"/>
<reg32 offset="0x054d" name="RBBM_PRIMCTR_6_HI"/>
<reg32 offset="0x054e" name="RBBM_PRIMCTR_7_LO"/>
<reg32 offset="0x054f" name="RBBM_PRIMCTR_7_HI"/>
<!-- PRIMCTR_8 appears to count number of primitives coming out of GS -->
<reg32 offset="0x0550" name="RBBM_PRIMCTR_8_LO"/>
<reg32 offset="0x0551" name="RBBM_PRIMCTR_8_HI"/>
<reg32 offset="0x0552" name="RBBM_PRIMCTR_9_LO"/>
<reg32 offset="0x0553" name="RBBM_PRIMCTR_9_HI"/>
<reg32 offset="0x0554" name="RBBM_PRIMCTR_10_LO"/>
<reg32 offset="0x0555" name="RBBM_PRIMCTR_10_HI"/>
<reg32 offset="0xF400" name="RBBM_SECVID_TRUST_CNTL"/>
<reg32 offset="0xF800" name="RBBM_SECVID_TSB_TRUSTED_BASE_LO"/>
<reg32 offset="0xF801" name="RBBM_SECVID_TSB_TRUSTED_BASE_HI"/>

2
src/freedreno/registers/adreno_pm4.xml
View File

@ -16,6 +16,8 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
<value name="VIZQUERY_END" value="8"/>
<value name="SC_WAIT_WC" value="9"/>
<value name="WRITE_PRIMITIVE_COUNTS" value="9" variants="A6XX"/>
<value name="START_PRIMITIVE_CTRS" value="11" variants="A6XX"/>
<value name="STOP_PRIMITIVE_CTRS" value="12" variants="A6XX"/>
<value name="RST_PIX_CNT" value="13"/>
<value name="RST_VTX_CNT" value="14"/>
<value name="TILE_FLUSH" value="15"/>

34
src/gallium/drivers/freedreno/a6xx/fd6_query.c
View File

@ -256,6 +256,8 @@ struct PACKED fd6_primitives_sample {
struct {
uint64_t generated, emitted;
} start[4], stop[4], result;
uint64_t prim_start[16], prim_stop[16], prim_emitted;
};
@ -268,6 +270,17 @@ static void
primitive_counts_resume(struct fd_acc_query *aq, struct fd_batch *batch)
{
struct fd_ringbuffer *ring = batch->draw;
const unsigned count = 1;
fd_wfi(batch, ring);
OUT_PKT7(ring, CP_REG_TO_MEM, 3);
OUT_RING(ring, CP_REG_TO_MEM_0_64B |
CP_REG_TO_MEM_0_CNT(count - 1) |
CP_REG_TO_MEM_0_REG(REG_A6XX_RBBM_PRIMCTR_8_LO));
primitives_relocw(ring, aq, prim_start);
fd6_event_write(batch, ring, START_PRIMITIVE_CTRS, false);
OUT_PKT4(ring, REG_A6XX_VPC_SO_STREAM_COUNTS_LO, 2);
primitives_relocw(ring, aq, start[0]);
@ -279,6 +292,25 @@ static void
primitive_counts_pause(struct fd_acc_query *aq, struct fd_batch *batch)
{
struct fd_ringbuffer *ring = batch->draw;
const unsigned count = 1;
fd_wfi(batch, ring);
/* snapshot the end values: */
OUT_PKT7(ring, CP_REG_TO_MEM, 3);
OUT_RING(ring, CP_REG_TO_MEM_0_64B |
CP_REG_TO_MEM_0_CNT(count - 1) |
CP_REG_TO_MEM_0_REG(REG_A6XX_RBBM_PRIMCTR_8_LO));
primitives_relocw(ring, aq, prim_stop);
/* result += stop - start: */
OUT_PKT7(ring, CP_MEM_TO_MEM, 9);
OUT_RING(ring, CP_MEM_TO_MEM_0_DOUBLE |
CP_MEM_TO_MEM_0_NEG_C | 0x40000000);
primitives_relocw(ring, aq, result.generated);
primitives_reloc(ring, aq, prim_emitted);
primitives_reloc(ring, aq, prim_stop);
primitives_reloc(ring, aq, prim_start);
OUT_PKT4(ring, REG_A6XX_VPC_SO_STREAM_COUNTS_LO, 2);
primitives_relocw(ring, aq, stop[0]);
@ -304,6 +336,8 @@ primitive_counts_pause(struct fd_acc_query *aq, struct fd_batch *batch)
primitives_reloc(ring, aq, result.generated);
primitives_reloc(ring, aq, stop[aq->base.index].generated);
primitives_reloc(ring, aq, start[aq->base.index].generated);
fd6_event_write(batch, ring, STOP_PRIMITIVE_CTRS, false);
}
static void