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i965: Program DWord Length in MI_FLUSH_DW 

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: <mesa-stable@lists.freedesktop.org>
This commit is contained in:
Anuj Phogat 2017-11-10 14:39:17 -08:00
parent 5d8164c428
commit 6165fda59b
2 changed files with 2 additions and 2 deletions
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2
src/mesa/drivers/dri/i965/brw_pipe_control.c
View File

@ -462,7 +462,7 @@ brw_emit_mi_flush(struct brw_context *brw)
if (brw->batch.ring == BLT_RING && devinfo->gen >= 6) {
BEGIN_BATCH_BLT(4);
OUT_BATCH(MI_FLUSH_DW);
OUT_BATCH(MI_FLUSH_DW | (4 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);

2
src/mesa/drivers/dri/i965/intel_blit.c
View File

@ -104,7 +104,7 @@ set_blitter_tiling(struct brw_context *brw,
assert(brw->screen->devinfo.gen >= 6);
/* Idle the blitter before we update how tiling is interpreted. */
OUT_BATCH(MI_FLUSH_DW);
OUT_BATCH(MI_FLUSH_DW | (4 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);