radv/pipeline: handle tessellation shader compilation
So tess shaders have some circular dependencies, TCS needs the TES primitive mode TES needs the TCS vertices out This builds the nir for each shader first to get the info, executes a tes specific nir pass, then builds the LLVM shaders. Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -589,6 +589,131 @@ radv_pipeline_compile(struct radv_pipeline *pipeline,
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return variant;
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return variant;
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}
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}
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static union ac_shader_variant_key
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radv_compute_tes_key(bool as_es)
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{
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union ac_shader_variant_key key;
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memset(&key, 0, sizeof(key));
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key.tes.as_es = as_es;
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return key;
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}
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static union ac_shader_variant_key
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radv_compute_tcs_key(unsigned primitive_mode, unsigned input_vertices)
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{
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union ac_shader_variant_key key;
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memset(&key, 0, sizeof(key));
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key.tcs.primitive_mode = primitive_mode;
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key.tcs.input_vertices = input_vertices;
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return key;
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}
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static void
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radv_tess_pipeline_compile(struct radv_pipeline *pipeline,
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struct radv_pipeline_cache *cache,
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struct radv_shader_module *tcs_module,
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struct radv_shader_module *tes_module,
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const char *tcs_entrypoint,
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const char *tes_entrypoint,
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const VkSpecializationInfo *tcs_spec_info,
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const VkSpecializationInfo *tes_spec_info,
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struct radv_pipeline_layout *layout,
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unsigned input_vertices)
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{
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unsigned char tcs_sha1[20], tes_sha1[20];
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struct radv_shader_variant *tes_variant = NULL, *tcs_variant = NULL;
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nir_shader *tes_nir, *tcs_nir;
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void *tes_code = NULL, *tcs_code = NULL;
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unsigned tes_code_size = 0, tcs_code_size = 0;
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union ac_shader_variant_key tes_key = radv_compute_tes_key(radv_pipeline_has_gs(pipeline));
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union ac_shader_variant_key tcs_key;
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bool dump = (pipeline->device->debug_flags & RADV_DEBUG_DUMP_SHADERS);
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if (tes_module->nir)
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_mesa_sha1_compute(tes_module->nir->info->name,
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strlen(tes_module->nir->info->name),
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tes_module->sha1);
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radv_hash_shader(tes_sha1, tes_module, tes_entrypoint, tes_spec_info, layout, &tes_key, 0);
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tes_variant = radv_create_shader_variant_from_pipeline_cache(pipeline->device,
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cache,
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tes_sha1);
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if (tes_variant) {
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tcs_key = radv_compute_tcs_key(tes_variant->info.tes.primitive_mode, input_vertices);
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if (tcs_module->nir)
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_mesa_sha1_compute(tcs_module->nir->info->name,
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strlen(tcs_module->nir->info->name),
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tcs_module->sha1);
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radv_hash_shader(tcs_sha1, tcs_module, tcs_entrypoint, tcs_spec_info, layout, &tcs_key, 0);
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tcs_variant = radv_create_shader_variant_from_pipeline_cache(pipeline->device,
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cache,
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tcs_sha1);
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}
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if (tcs_variant && tes_variant) {
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pipeline->shaders[MESA_SHADER_TESS_CTRL] = tcs_variant;
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pipeline->shaders[MESA_SHADER_TESS_EVAL] = tes_variant;
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return;
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}
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tes_nir = radv_shader_compile_to_nir(pipeline->device,
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tes_module, tes_entrypoint, MESA_SHADER_TESS_EVAL,
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tes_spec_info, dump);
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if (tes_nir == NULL)
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return;
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tcs_nir = radv_shader_compile_to_nir(pipeline->device,
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tcs_module, tcs_entrypoint, MESA_SHADER_TESS_CTRL,
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tcs_spec_info, dump);
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if (tcs_nir == NULL)
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return;
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nir_lower_tes_patch_vertices(tes_nir,
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tcs_nir->info->tess.tcs_vertices_out);
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tes_variant = radv_shader_variant_create(pipeline->device, tes_nir,
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layout, &tes_key, &tes_code,
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&tes_code_size, dump);
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tcs_key = radv_compute_tcs_key(tes_nir->info->tess.primitive_mode, input_vertices);
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if (tcs_module->nir)
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_mesa_sha1_compute(tcs_module->nir->info->name,
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strlen(tcs_module->nir->info->name),
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tcs_module->sha1);
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radv_hash_shader(tcs_sha1, tcs_module, tcs_entrypoint, tcs_spec_info, layout, &tcs_key, 0);
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tcs_variant = radv_shader_variant_create(pipeline->device, tcs_nir,
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layout, &tcs_key, &tcs_code,
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&tcs_code_size, dump);
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if (!tes_module->nir)
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ralloc_free(tes_nir);
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if (!tcs_module->nir)
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ralloc_free(tcs_nir);
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if (tes_variant)
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tes_variant = radv_pipeline_cache_insert_shader(cache, tes_sha1, tes_variant,
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tes_code, tes_code_size);
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if (tcs_variant)
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tcs_variant = radv_pipeline_cache_insert_shader(cache, tcs_sha1, tcs_variant,
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tcs_code, tcs_code_size);
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if (tes_code)
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free(tes_code);
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if (tcs_code)
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free(tcs_code);
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pipeline->shaders[MESA_SHADER_TESS_CTRL] = tcs_variant;
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pipeline->shaders[MESA_SHADER_TESS_EVAL] = tes_variant;
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return;
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}
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static VkResult
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static VkResult
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radv_pipeline_scratch_init(struct radv_device *device,
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radv_pipeline_scratch_init(struct radv_device *device,
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struct radv_pipeline *pipeline)
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struct radv_pipeline *pipeline)
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@ -1876,6 +2001,23 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
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} else
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} else
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pipeline->graphics.vgt_gs_mode = 0;
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pipeline->graphics.vgt_gs_mode = 0;
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if (modules[MESA_SHADER_TESS_EVAL]) {
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assert(modules[MESA_SHADER_TESS_CTRL]);
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radv_tess_pipeline_compile(pipeline,
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cache,
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modules[MESA_SHADER_TESS_CTRL],
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modules[MESA_SHADER_TESS_EVAL],
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pStages[MESA_SHADER_TESS_CTRL]->pName,
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pStages[MESA_SHADER_TESS_EVAL]->pName,
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pStages[MESA_SHADER_TESS_CTRL]->pSpecializationInfo,
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pStages[MESA_SHADER_TESS_EVAL]->pSpecializationInfo,
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pipeline->layout,
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pCreateInfo->pTessellationState->patchControlPoints);
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pipeline->active_stages |= mesa_to_vk_shader_stage(MESA_SHADER_TESS_EVAL) |
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mesa_to_vk_shader_stage(MESA_SHADER_TESS_CTRL);
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}
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if (!modules[MESA_SHADER_FRAGMENT]) {
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if (!modules[MESA_SHADER_FRAGMENT]) {
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nir_builder fs_b;
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nir_builder fs_b;
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nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL);
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nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL);
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