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nvc0/ir: fix LSB/BFE/BFI implementations 

Overwriting the src register is a very bad idea - it logically maps onto
the TGSI registers, and so is effectively overwriting the source values.

Reported-by: Boyan Ding <boyan.j.ding@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
This commit is contained in:
Ilia Mirkin 2017-04-07 20:17:47 -04:00
parent c05cf9cf1b
commit 60f5766db4
1 changed files with 11 additions and 8 deletions
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19
src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
View File

@ -3761,16 +3761,17 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
case TGSI_OPCODE_UBFE:
FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
src0 = fetchSrc(0, c);
val0 = getScratch();
if (tgsi.getSrc(1).getFile() == TGSI_FILE_IMMEDIATE &&
tgsi.getSrc(2).getFile() == TGSI_FILE_IMMEDIATE) {
src1 = loadImm(NULL, tgsi.getSrc(2).getValueU32(c, info) << 8 |
tgsi.getSrc(1).getValueU32(c, info));
loadImm(val0, (tgsi.getSrc(2).getValueU32(c, info) << 8) |
tgsi.getSrc(1).getValueU32(c, info));
} else {
src1 = fetchSrc(1, c);
src2 = fetchSrc(2, c);
mkOp3(OP_INSBF, TYPE_U32, src1, src2, mkImm(0x808), src1);
mkOp3(OP_INSBF, TYPE_U32, val0, src2, mkImm(0x808), src1);
}
mkOp2(OP_EXTBF, dstTy, dst0[c], src0, src1);
mkOp2(OP_EXTBF, dstTy, dst0[c], src0, val0);
}
break;
case TGSI_OPCODE_BFI:
@ -3779,16 +3780,18 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
src1 = fetchSrc(1, c);
src2 = fetchSrc(2, c);
src3 = fetchSrc(3, c);
mkOp3(OP_INSBF, TYPE_U32, src2, src3, mkImm(0x808), src2);
mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, src2, src0);
val0 = getScratch();
mkOp3(OP_INSBF, TYPE_U32, val0, src3, mkImm(0x808), src2);
mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, val0, src0);
}
break;
case TGSI_OPCODE_LSB:
FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
src0 = fetchSrc(0, c);
geni = mkOp2(OP_EXTBF, TYPE_U32, src0, src0, mkImm(0x2000));
val0 = getScratch();
geni = mkOp2(OP_EXTBF, TYPE_U32, val0, src0, mkImm(0x2000));
geni->subOp = NV50_IR_SUBOP_EXTBF_REV;
geni = mkOp1(OP_BFIND, TYPE_U32, dst0[c], src0);
geni = mkOp1(OP_BFIND, TYPE_U32, dst0[c], val0);
geni->subOp = NV50_IR_SUBOP_BFIND_SAMT;
}
break;