i965: Add functions to abstract access to 3src register types

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
This commit is contained in:
Matt Turner 2017-08-24 16:14:35 -07:00
parent e15dac319b
commit 5f6ee55e68
2 changed files with 23 additions and 20 deletions

View File

@ -736,26 +736,8 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
* may send us mixed D and UD types and want us to ignore that and use
* the destination type.
*/
switch (dest.type) {
case BRW_REGISTER_TYPE_F:
brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_F);
brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_F);
break;
case BRW_REGISTER_TYPE_DF:
brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_DF);
brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_DF);
break;
case BRW_REGISTER_TYPE_D:
brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_D);
brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_D);
break;
case BRW_REGISTER_TYPE_UD:
brw_inst_set_3src_a16_src_hw_type(devinfo, inst, BRW_3SRC_TYPE_UD);
brw_inst_set_3src_a16_dst_hw_type(devinfo, inst, BRW_3SRC_TYPE_UD);
break;
default:
unreachable("not reached");
}
brw_inst_set_3src_a16_src_type(devinfo, inst, dest.type);
brw_inst_set_3src_a16_dst_type(devinfo, inst, dest.type);
}
return inst;

View File

@ -246,6 +246,27 @@ F(3src_access_mode, 8, 8)
F(3src_opcode, 6, 0)
/** @} */
#define REG_TYPE(reg) \
static inline void \
brw_inst_set_3src_a16_##reg##_type(const struct gen_device_info *devinfo, \
brw_inst *inst, enum brw_reg_type type) \
{ \
unsigned hw_type = brw_reg_type_to_hw_3src_type(devinfo, type); \
brw_inst_set_3src_a16_##reg##_hw_type(devinfo, inst, hw_type); \
} \
\
static inline enum brw_reg_type \
brw_inst_3src_a16_##reg##_type(const struct gen_device_info *devinfo, \
const brw_inst *inst) \
{ \
unsigned hw_type = brw_inst_3src_a16_##reg##_hw_type(devinfo, inst); \
return brw_hw_3src_type_to_reg_type(devinfo, hw_type); \
}
REG_TYPE(dst)
REG_TYPE(src)
#undef REG_TYPE
/**
* Flow control instruction bits:
* @{