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ir3/lower_spill: Fix corner case with oob offsets 

If the base register is killed, it may be reused as the destination of a
ldp. In that case we should just skip resetting it afterwards.

Fixes regressions in dEQP-VK.ssbo.layout.random.scalar.38 later.

Fixes: 9912c61362 ("ir3/spill: Support larger spill slot offset")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15288>
This commit is contained in:
Connor Abbott 2022-03-08 13:57:04 +01:00 committed by Marge Bot
parent 6304c7cb82
commit 5f020bcc8d
1 changed files with 9 additions and 1 deletions
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10
src/freedreno/ir3/ir3_lower_spill.c
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@ -65,8 +65,16 @@ set_base_reg(struct ir3_instruction *mem, unsigned val)
static void
reset_base_reg(struct ir3_instruction *mem)
{
/* If the base register is killed, then we don't need to clobber it and it
* may be reused as a destination so we can't always clobber it after the
* instruction anyway.
*/
struct ir3_register *base = mem->srcs[0];
if (base->flags & IR3_REG_KILL)
return;
struct ir3_instruction *mov = ir3_instr_create(mem->block, OPC_MOV, 1, 1);
ir3_dst_create(mov, mem->srcs[0]->num, mem->srcs[0]->flags);
ir3_dst_create(mov, base->num, base->flags);
ir3_src_create(mov, INVALID_REG, IR3_REG_IMMED)->uim_val = 0;
mov->cat1.dst_type = mov->cat1.src_type = TYPE_U32;