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Merge branch 'mesa_7_6_branch' of git+ssh://agd5f@git.freedesktop.org/git/mesa/mesa

This commit is contained in:
Alex Deucher 2009-10-22 12:02:31 -04:00
parent c4af8ce69e 869e20bcb7
commit 5e77b61e39
6 changed files with 87 additions and 9 deletions
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5
progs/trivial/tri-query.c
View File

@ -39,6 +39,11 @@ GLenum doubleBuffer;
static void Init(void)
{
if (!glutExtensionSupported("GL_ARB_occlusion_query")) {
fprintf(stderr, "Sorry, this program requires GL_ARB_occlusion_query\n");
exit(1);
}
fprintf(stderr, "GL_RENDERER = %s\n", (char *) glGetString(GL_RENDERER));
fprintf(stderr, "GL_VERSION = %s\n", (char *) glGetString(GL_VERSION));
fprintf(stderr, "GL_VENDOR = %s\n", (char *) glGetString(GL_VENDOR));

4
src/gallium/drivers/cell/ppu/cell_gen_fp.c
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@ -674,7 +674,7 @@ emit_MAD(struct codegen *gen, const struct tgsi_full_instruction *inst)
* Emit linear interpolate. See emit_ADD for comments.
*/
static boolean
emit_LERP(struct codegen *gen, const struct tgsi_full_instruction *inst)
emit_LRP(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
int ch, s1_reg[4], s2_reg[4], s3_reg[4], d_reg[4], tmp_reg[4];
@ -1766,7 +1766,7 @@ emit_instruction(struct codegen *gen,
return emit_binop(gen, inst);
case TGSI_OPCODE_MAD:
return emit_MAD(gen, inst);
case TGSI_OPCODE_LERP:
case TGSI_OPCODE_LRP:
return emit_LRP(gen, inst);
case TGSI_OPCODE_DP3:
return emit_DP3(gen, inst);

46
src/mesa/drivers/dri/r600/r700_assembler.c
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@ -355,6 +355,7 @@ unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm)
return 2;
case SQ_OP2_INST_MOV:
case SQ_OP2_INST_MOVA_FLOOR:
case SQ_OP2_INST_FRACT:
case SQ_OP2_INST_FLOOR:
case SQ_OP2_INST_EXP_IEEE:
@ -2191,7 +2192,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)
}
//other bits
alu_instruction_ptr->m_Word0.f.index_mode = SQ_INDEX_LOOP;
alu_instruction_ptr->m_Word0.f.index_mode = SQ_INDEX_AR_X;
if( (is_single_scalar_operation == GL_TRUE)
|| (GL_TRUE == bSplitInst) )
@ -2525,6 +2526,35 @@ GLboolean assemble_ADD(r700_AssemblerBase *pAsm)
return GL_TRUE;
}
GLboolean assemble_ARL(r700_AssemblerBase *pAsm)
{ /* TODO: ar values dont' persist between clauses */
if( GL_FALSE == checkop1(pAsm) )
{
return GL_FALSE;
}
pAsm->D.dst.opcode = SQ_OP2_INST_MOVA_FLOOR;
setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
pAsm->D.dst.rtype = DST_REG_TEMPORARY;
pAsm->D.dst.reg = 0;
pAsm->D.dst.writex = 0;
pAsm->D.dst.writey = 0;
pAsm->D.dst.writez = 0;
pAsm->D.dst.writew = 0;
if( GL_FALSE == assemble_src(pAsm, 0, -1) )
{
return GL_FALSE;
}
if( GL_FALSE == next_ins(pAsm) )
{
return GL_FALSE;
}
return GL_TRUE;
}
GLboolean assemble_BAD(char *opcode_str)
{
radeon_error("Not yet implemented instruction (%s)\n", opcode_str);
@ -3939,8 +3969,7 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,
break;
case OPCODE_ARL:
radeon_error("Not yet implemented instruction OPCODE_ARL \n");
//if ( GL_FALSE == assemble_BAD("ARL") )
if ( GL_FALSE == assemble_ARL(pR700AsmCode) )
return GL_FALSE;
break;
case OPCODE_ARR:
@ -4285,6 +4314,7 @@ GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode,
GLbitfield OutputsWritten)
{
unsigned int unBit;
GLuint export_count = 0;
if(pR700AsmCode->depth_export_register_number >= 0)
{
@ -4306,6 +4336,7 @@ GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode,
{
return GL_FALSE;
}
export_count++;
}
unBit = 1 << FRAG_RESULT_DEPTH;
if(OutputsWritten & unBit)
@ -4319,8 +4350,15 @@ GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode,
{
return GL_FALSE;
}
export_count++;
}
/* Need to export something, otherwise we'll hang
* results are undefined anyway */
if(export_count == 0)
{
Process_Export(pR700AsmCode, SQ_EXPORT_PIXEL, 0, 1, 0, GL_FALSE);
}
if(pR700AsmCode->cf_last_export_ptr != NULL)
{
pR700AsmCode->cf_last_export_ptr->m_Word1.f.cf_inst = SQ_CF_INST_EXPORT_DONE;

1
src/mesa/drivers/dri/r600/r700_assembler.h
View File

@ -470,6 +470,7 @@ GLboolean next_ins(r700_AssemblerBase *pAsm);
GLboolean assemble_math_function(r700_AssemblerBase* pAsm, BITS opcode);
GLboolean assemble_ABS(r700_AssemblerBase *pAsm);
GLboolean assemble_ADD(r700_AssemblerBase *pAsm);
GLboolean assemble_ARL(r700_AssemblerBase *pAsm);
GLboolean assemble_BAD(char *opcode_str);
GLboolean assemble_CMP(r700_AssemblerBase *pAsm);
GLboolean assemble_COS(r700_AssemblerBase *pAsm);

37
src/mesa/drivers/dri/r600/r700_fragprog.c
View File

@ -135,15 +135,19 @@ GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
{
GLuint i, j;
GLint * puiTEMPwrites;
GLint * puiTEMPreads;
struct prog_instruction * pILInst;
InstDeps *pInstDeps;
struct prog_instruction * texcoord_DepInst;
GLint nDepInstID;
puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
puiTEMPreads = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
for(i=0; i<mesa_fp->Base.NumTemporaries; i++)
{
puiTEMPwrites[i] = -1;
puiTEMPreads[i] = -1;
}
pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_fp->Base.NumInstructions);
@ -167,6 +171,11 @@ GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
{
//Set dep.
pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
//Set first read
if(puiTEMPreads[pILInst->SrcReg[j].Index] < 0 )
{
puiTEMPreads[pILInst->SrcReg[j].Index] = i;
}
}
else
{
@ -177,8 +186,6 @@ GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
fp->r700AsmCode.pInstDeps = pInstDeps;
FREE(puiTEMPwrites);
//Find dep for tex inst
for(i=0; i<mesa_fp->Base.NumInstructions; i++)
{
@ -203,9 +210,25 @@ GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
{ //... other deps?
}
}
// make sure that we dont overwrite src used earlier
nDepInstID = puiTEMPreads[pILInst->DstReg.Index];
if(nDepInstID < i)
{
pInstDeps[i].nDstDep = puiTEMPreads[pILInst->DstReg.Index];
texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
{
pInstDeps[nDepInstID].nDstDep = i;
}
}
}
}
FREE(puiTEMPwrites);
FREE(puiTEMPreads);
return GL_TRUE;
}
@ -251,7 +274,15 @@ GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
number_of_colors_exported--;
}
fp->r700Shader.exportMode = number_of_colors_exported << 1 | z_enabled;
/* illegal to set this to 0 */
if(number_of_colors_exported || z_enabled)
{
fp->r700Shader.exportMode = number_of_colors_exported << 1 | z_enabled;
}
else
{
fp->r700Shader.exportMode = (1 << 1);
}
fp->translated = GL_TRUE;

3
src/mesa/main/imports.c
View File

@ -50,6 +50,9 @@
#ifdef _GNU_SOURCE
#include <locale.h>
#ifdef __APPLE__
#include <xlocale.h>
#endif
#endif