i965/vec4: Implement nir_op_pack_uvec2_to_uint.
And mark nir_op_pack_uvec4_to_uint unreachable, since it's only produced by lowering pack[SU]norm4x8 which the vec4 backend does not need.
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@ -1325,6 +1325,24 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
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case nir_op_pack_unorm_2x16:
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unreachable("not reached: should be handled by lower_packing_builtins");
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case nir_op_pack_uvec4_to_uint:
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unreachable("not reached");
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case nir_op_pack_uvec2_to_uint: {
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dst_reg tmp1 = dst_reg(this, glsl_type::uint_type);
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tmp1.writemask = WRITEMASK_X;
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op[0].swizzle = BRW_SWIZZLE_YYYY;
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emit(SHL(tmp1, op[0], src_reg(brw_imm_ud(16u))));
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dst_reg tmp2 = dst_reg(this, glsl_type::uint_type);
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tmp2.writemask = WRITEMASK_X;
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op[0].swizzle = BRW_SWIZZLE_XXXX;
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emit(AND(tmp2, op[0], src_reg(brw_imm_ud(0xffffu))));
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emit(OR(dst, src_reg(tmp1), src_reg(tmp2)));
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break;
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}
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case nir_op_unpack_half_2x16:
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/* As NIR does not guarantee that we have a correct swizzle outside the
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* boundaries of a vector, and the implementation of emit_unpack_half_2x16
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