From 5d957011ffbb3434596bb04049fbef1932935379 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Sun, 6 Feb 2022 10:05:40 -0500 Subject: [PATCH] asahi: Align allocations to effective tile size May be smaller than 64x64. Signed-off-by: Alyssa Rosenzweig Part-of: --- src/gallium/drivers/asahi/agx_pipe.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/asahi/agx_pipe.c b/src/gallium/drivers/asahi/agx_pipe.c index f8ea533676c..4da5409e810 100644 --- a/src/gallium/drivers/asahi/agx_pipe.c +++ b/src/gallium/drivers/asahi/agx_pipe.c @@ -165,14 +165,17 @@ agx_resource_create(struct pipe_screen *screen, nresource->modifier = agx_select_modifier(nresource); unsigned offset = 0; + unsigned blocksize = util_format_get_blocksize(templ->format); for (unsigned l = 0; l <= templ->last_level; ++l) { unsigned width = u_minify(templ->width0, l); unsigned height = u_minify(templ->height0, l); if (nresource->modifier == DRM_FORMAT_MOD_APPLE_64X64_MORTON_ORDER) { - width = ALIGN_POT(width, 64); - height = ALIGN_POT(height, 64); + unsigned tile = agx_select_tile_size(templ->width0, templ->height0, l, blocksize); + + width = ALIGN_POT(width, tile); + height = ALIGN_POT(height, tile); } nresource->slices[l].line_stride =