pan/mdg: Analyze types for 64-bitness in RA
Instead of reg_mode. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
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@ -435,6 +435,20 @@ mir_compute_interference(
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}
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}
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static bool
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mir_is_64(midgard_instruction *ins)
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{
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if (nir_alu_type_get_type_size(ins->dest_type) == 64)
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return true;
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mir_foreach_src(ins, v) {
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if (nir_alu_type_get_type_size(ins->src_types[v]) == 64)
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return true;
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}
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return false;
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}
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/* This routine performs the actual register allocation. It should be succeeded
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/* This routine performs the actual register allocation. It should be succeeded
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* by install_registers */
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* by install_registers */
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@ -488,7 +502,7 @@ allocate_registers(compiler_context *ctx, bool *spilled)
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* but once we get RA we shouldn't disrupt this further. Align
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* but once we get RA we shouldn't disrupt this further. Align
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* sources of 64-bit instructions. */
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* sources of 64-bit instructions. */
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if (ins->type == TAG_ALU_4 && ins->alu.reg_mode == midgard_reg_mode_64) {
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if (ins->type == TAG_ALU_4 && mir_is_64(ins)) {
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mir_foreach_src(ins, v) {
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mir_foreach_src(ins, v) {
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unsigned s = ins->src[v];
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unsigned s = ins->src[v];
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