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r300/compiler: move hardware caps to the radeon_compiler base struct 

Needed for vertex shaders too.
This commit is contained in:
Marek Olšák 2010-05-26 04:18:27 +02:00
parent f2582da3bb
commit 5c067a6304
8 changed files with 23 additions and 20 deletions
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4
src/gallium/drivers/r300/r300_fs.c
View File

@ -251,8 +251,8 @@ static void r300_translate_fragment_shader(
compiler.code = &shader->code;
compiler.state = shader->compare_state;
compiler.is_r500 = r300->screen->caps.is_r500;
compiler.max_temp_regs = compiler.is_r500 ? 128 : 32;
compiler.Base.is_r500 = r300->screen->caps.is_r500;
compiler.Base.max_temp_regs = compiler.Base.is_r500 ? 128 : 32;
compiler.AllocateHwInputs = &allocate_hardware_inputs;
compiler.UserData = &shader->inputs;

2
src/gallium/drivers/r300/r300_vs.c
View File

@ -203,6 +203,8 @@ void r300_translate_vertex_shader(struct r300_context *r300,
compiler.Base.Debug = DBG_ON(r300, DBG_VP);
compiler.code = &vs->code;
compiler.UserData = vs;
compiler.Base.is_r500 = r300->screen->caps.is_r500;
compiler.Base.max_temp_regs = 32;
if (compiler.Base.Debug) {
debug_printf("r300: Initial vertex program\n");

2
src/mesa/drivers/dri/r300/compiler/r300_fragprog_emit.c
View File

@ -353,7 +353,7 @@ void r300BuildFragmentProgramHwCode(struct r300_fragment_program_compiler *compi
}
}
if (code->pixsize >= compiler->max_temp_regs)
if (code->pixsize >= compiler->Base.max_temp_regs)
rc_error(&compiler->Base, "Too many hardware temporaries used.\n");
if (compiler->Base.Error)

8
src/mesa/drivers/dri/r300/compiler/r3xx_fragprog.c
View File

@ -107,7 +107,7 @@ void r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c)
debug_program_log(c, "after emulate branches");
if (c->is_r500) {
if (c->Base.is_r500) {
struct radeon_program_transformation transformations[] = {
{ &r500_transform_IF, 0 },
{ &radeonTransformALU, 0 },
@ -174,14 +174,14 @@ void r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c)
debug_program_log(c, "after pair scheduling");
rc_pair_regalloc(c, c->max_temp_regs);
rc_pair_regalloc(c, c->Base.max_temp_regs);
if (c->Base.Error)
return;
debug_program_log(c, "after register allocation");
if (c->is_r500) {
if (c->Base.is_r500) {
r500BuildFragmentProgramHwCode(c);
} else {
r300BuildFragmentProgramHwCode(c);
@ -190,7 +190,7 @@ void r3xx_compile_fragment_program(struct r300_fragment_program_compiler* c)
rc_constants_copy(&c->code->constants, &c->Base.Program.Constants);
if (c->Base.Debug) {
if (c->is_r500) {
if (c->Base.is_r500) {
r500FragmentProgramDump(c->code);
} else {
r300FragmentProgramDump(c->code);

11
src/mesa/drivers/dri/r300/compiler/radeon_compiler.h
View File

@ -38,6 +38,10 @@ struct radeon_compiler {
unsigned Error:1;
char * ErrorMsg;
/* Hardware specification. */
unsigned is_r500;
unsigned max_temp_regs;
/**
* Variables used internally, not be touched by callers
* of the compiler
@ -84,12 +88,9 @@ struct r300_fragment_program_compiler {
/* Optional transformations and features. */
struct r300_fragment_program_external_state state;
unsigned enable_shadow_ambient;
/* Hardware specification. */
unsigned is_r500;
unsigned max_temp_regs;
/* Register corresponding to the depthbuffer. */
/* Register corresponding to the depthbuffer. */
unsigned OutputDepth;
/* Registers corresponding to the four colorbuffers. */
/* Registers corresponding to the four colorbuffers. */
unsigned OutputColor[4];
void * UserData;

6
src/mesa/drivers/dri/r300/compiler/radeon_program_tex.c
View File

@ -237,7 +237,7 @@ int radeonTransformTEX(
rc_wrap_mode wrapmode = compiler->state.unit[inst->U.I.TexSrcUnit].wrap_mode;
/* R300 cannot sample from rectangles. */
if (!compiler->is_r500) {
if (!c->is_r500) {
lower_texture_rect(compiler, inst);
}
@ -247,7 +247,7 @@ int radeonTransformTEX(
unsigned temp = rc_find_free_temporary(c);
/* For NPOT fallback, we need normalized coordinates anyway. */
if (compiler->is_r500) {
if (c->is_r500) {
lower_texture_rect(compiler, inst);
}
@ -358,7 +358,7 @@ int radeonTransformTEX(
/* Cannot write texture to output registers (all chips) or with masks (non-r500) */
if (inst->U.I.Opcode != RC_OPCODE_KIL &&
(inst->U.I.DstReg.File != RC_FILE_TEMPORARY ||
(!compiler->is_r500 && inst->U.I.DstReg.WriteMask != RC_MASK_XYZW))) {
(!c->is_r500 && inst->U.I.DstReg.WriteMask != RC_MASK_XYZW))) {
struct rc_instruction * inst_mov = rc_insert_new_instruction(c, inst);
inst_mov->U.I.Opcode = RC_OPCODE_MOV;

4
src/mesa/drivers/dri/r300/r300_blit.c
View File

@ -118,8 +118,8 @@ static void create_fragment_program(struct r300_context *r300)
compiler.OutputColor[0] = FRAG_RESULT_COLOR;
compiler.OutputDepth = FRAG_RESULT_DEPTH;
compiler.enable_shadow_ambient = GL_TRUE;
compiler.is_r500 = (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515);
compiler.max_temp_regs = (compiler.is_r500) ? 128 : 32;
compiler.Base.is_r500 = (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515);
compiler.Base.max_temp_regs = (compiler.Base.is_r500) ? 128 : 32;
compiler.code = &r300->blit.fp_code;
compiler.AllocateHwInputs = fp_allocate_hw_inputs;

6
src/mesa/drivers/dri/r300/r300_fragprog_common.c
View File

@ -220,8 +220,8 @@ static void translate_fragment_program(GLcontext *ctx, struct r300_fragment_prog
compiler.code = &fp->code;
compiler.state = fp->state;
compiler.enable_shadow_ambient = GL_TRUE;
compiler.is_r500 = (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) ? GL_TRUE : GL_FALSE;
compiler.max_temp_regs = (compiler.is_r500) ? 128 : 32;
compiler.Base.is_r500 = (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) ? GL_TRUE : GL_FALSE;
compiler.Base.max_temp_regs = (compiler.Base.is_r500) ? 128 : 32;
compiler.OutputDepth = FRAG_RESULT_DEPTH;
memset(compiler.OutputColor, 0, 4 * sizeof(unsigned));
compiler.OutputColor[0] = FRAG_RESULT_COLOR;
@ -242,7 +242,7 @@ static void translate_fragment_program(GLcontext *ctx, struct r300_fragment_prog
r3xx_compile_fragment_program(&compiler);
if (compiler.is_r500) {
if (compiler.Base.is_r500) {
/* We need to support the non-KMS DRM interface, which
* artificially limits the number of instructions and
* constants which are available to us.