gallium/i915: handle query_renderer caps
Implementation based on the classic driver with the following changes: - Use auxiliarry function os_get_total_physical_memory to get the total amount of memory. - Move the libdrm_intel specific get_aperture_size to the winsys. Cc: Stephane Marchesin <stephane.marchesin@gmail.com> Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
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@ -27,6 +27,7 @@
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#include "draw/draw_context.h"
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#include "draw/draw_context.h"
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#include "os/os_misc.h"
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#include "util/u_format.h"
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#include "util/u_format.h"
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#include "util/u_format_s3tc.h"
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#include "util/u_format_s3tc.h"
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#include "util/u_inlines.h"
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#include "util/u_inlines.h"
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@ -283,6 +284,28 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
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case PIPE_CAP_ENDIANNESS:
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case PIPE_CAP_ENDIANNESS:
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return PIPE_ENDIAN_LITTLE;
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return PIPE_ENDIAN_LITTLE;
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case PIPE_CAP_VENDOR_ID:
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return 0x8086;
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case PIPE_CAP_DEVICE_ID:
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return is->iws->pci_id;
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case PIPE_CAP_ACCELERATED:
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return 1;
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case PIPE_CAP_VIDEO_MEMORY: {
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/* Once a batch uses more than 75% of the maximum mappable size, we
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* assume that there's some fragmentation, and we start doing extra
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* flushing, etc. That's the big cliff apps will care about.
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*/
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const int gpu_mappable_megabytes = is->iws->aperture_size(is->iws) * 3 / 4;
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uint64_t system_memory;
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if (!os_get_total_physical_memory(&system_memory))
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return 0;
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return MIN2(gpu_mappable_megabytes, (int) (system_memory >> 20));
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}
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case PIPE_CAP_UMA:
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return 1;
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default:
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default:
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debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
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debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
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return 0;
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return 0;
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@ -247,6 +247,11 @@ struct i915_winsys {
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struct pipe_fence_handle *fence);
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struct pipe_fence_handle *fence);
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/*@}*/
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/*@}*/
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/**
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* Retrieve the aperture size (in MiB) of the device.
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*/
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int (*aperture_size)(struct i915_winsys *iws);
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/**
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/**
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* Destroy the winsys.
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* Destroy the winsys.
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@ -28,6 +28,17 @@ i915_drm_get_device_id(int fd, unsigned int *device_id)
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assert(ret == 0);
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assert(ret == 0);
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}
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}
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static int
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i915_drm_aperture_size(struct i915_winsys *iws)
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{
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struct i915_drm_winsys *idws = i915_drm_winsys(iws);
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size_t aper_size, mappable_size;
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drm_intel_get_aperture_sizes(idws->fd, &mappable_size, &aper_size);
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return aper_size >> 20;
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}
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static void
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static void
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i915_drm_winsys_destroy(struct i915_winsys *iws)
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i915_drm_winsys_destroy(struct i915_winsys *iws)
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{
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{
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@ -58,6 +69,7 @@ i915_drm_winsys_create(int drmFD)
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idws->base.pci_id = deviceID;
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idws->base.pci_id = deviceID;
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idws->max_batch_size = 1 * 4096;
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idws->max_batch_size = 1 * 4096;
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idws->base.aperture_size = i915_drm_aperture_size;
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idws->base.destroy = i915_drm_winsys_destroy;
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idws->base.destroy = i915_drm_winsys_destroy;
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idws->gem_manager = drm_intel_bufmgr_gem_init(idws->fd, idws->max_batch_size);
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idws->gem_manager = drm_intel_bufmgr_gem_init(idws->fd, idws->max_batch_size);
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