pan/midgard: Fix REGISTER_OFFSET
r27 isn't the special one, usually. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
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@ -170,8 +170,7 @@ quadword_size(int tag)
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#define REGISTER_UNUSED 24
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#define REGISTER_CONSTANT 26
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#define REGISTER_VARYING_BASE 26
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#define REGISTER_OFFSET 27
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#define REGISTER_LDST_BASE 26
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#define REGISTER_TEXTURE_BASE 28
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#define REGISTER_SELECT 31
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@ -662,7 +662,7 @@ emit_indirect_offset(compiler_context *ctx, nir_src *src)
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.ssa_args = {
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.src0 = SSA_UNUSED_1,
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.src1 = offset,
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.dest = SSA_FIXED_REGISTER(REGISTER_OFFSET),
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.dest = SSA_FIXED_REGISTER(REGISTER_LDST_BASE + 1),
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},
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.alu = {
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.op = midgard_alu_op_imov,
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