diff --git a/src/panfrost/midgard/midgard.h b/src/panfrost/midgard/midgard.h index 1dfa7e9f257..63f2fa2f586 100644 --- a/src/panfrost/midgard/midgard.h +++ b/src/panfrost/midgard/midgard.h @@ -479,6 +479,7 @@ typedef enum { /* Old version of midgard_op_ld_color_buffer_as_fp16, for T720 */ midgard_op_ld_color_buffer_as_fp16_old = 0x9D, + midgard_op_ld_color_buffer_32u_old = 0x9E, /* The distinction between these ops is the alignment requirement / * accompanying shift. Thus, the offset to ld_ubo_int4 is in 16-byte diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index 233f23f44d7..e1d6cac7672 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -1581,15 +1581,19 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) midgard_op_ld_color_buffer_as_fp16_old : midgard_op_ld_color_buffer_as_fp16; - if (old_blend) { - ld.load_store.address = 1; - ld.load_store.arg_2 = 0x1E; - } - for (unsigned c = 4; c < 16; ++c) ld.swizzle[0][c] = 0; ld.dest_type = nir_type_float16; + + if (old_blend) { + ld.load_store.address = 1; + ld.load_store.arg_2 = 0x1E; + } + } else if (old_blend) { + ld.load_store.op = midgard_op_ld_color_buffer_32u_old; + ld.load_store.address = 16; + ld.load_store.arg_2 = 0x1E; } emit_mir_instruction(ctx, ld); diff --git a/src/panfrost/midgard/midgard_ops.c b/src/panfrost/midgard/midgard_ops.c index dc30eceec2d..3055f0b93f5 100644 --- a/src/panfrost/midgard/midgard_ops.c +++ b/src/panfrost/midgard/midgard_ops.c @@ -227,6 +227,7 @@ struct mir_ldst_op_props load_store_opcode_props[256] = { [midgard_op_ld_vary_32u] = {"ld_vary_32u", M32}, [midgard_op_ld_color_buffer_32u] = {"ld_color_buffer_32u", M32}, + [midgard_op_ld_color_buffer_32u_old] = {"ld_color_buffer_32u_old", M32}, [midgard_op_ld_color_buffer_as_fp16] = {"ld_color_buffer_as_fp16", M16}, [midgard_op_ld_color_buffer_as_fp16_old] = {"ld_color_buffer_as_fp16_old", M16 | LDST_SPECIAL_MASK},