ir3/validate: Switch to srcs/dsts arrays
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11469>
This commit is contained in:
Connor Abbott
Marge Bot
parent
050ec77d1b
commit
58fb0a01e1
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@ -60,7 +60,8 @@ reg_class_flags(struct ir3_register *reg)
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}
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static void
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validate_src(struct ir3_validate_ctx *ctx, struct ir3_register *reg)
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validate_src(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr,
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struct ir3_register *reg)
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{
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struct ir3_instruction *src = ssa(reg);
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@ -68,8 +69,20 @@ validate_src(struct ir3_validate_ctx *ctx, struct ir3_register *reg)
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return;
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validate_assert(ctx, _mesa_set_search(ctx->defs, src));
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validate_assert(ctx, src->regs[0]->wrmask == reg->wrmask);
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validate_assert(ctx, reg_class_flags(src->regs[0]) == reg_class_flags(reg));
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validate_assert(ctx, src->dsts[0]->wrmask == reg->wrmask);
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validate_assert(ctx, reg_class_flags(src->dsts[0]) == reg_class_flags(reg));
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if (reg->tied) {
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validate_assert(ctx, reg->tied->tied == reg);
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bool found = false;
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for (unsigned i = 0; i < instr->dsts_count; i++) {
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if (instr->dsts[i] == reg->tied) {
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found = true;
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break;
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}
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}
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validate_assert(ctx, found && "tied register not in the same instruction");
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}
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}
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/* phi sources are logically read at the end of the predecessor basic block,
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@ -86,8 +99,8 @@ validate_phi_src(struct ir3_validate_ctx *ctx, struct ir3_block *block, struct i
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break;
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ctx->current_instr = phi;
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validate_assert(ctx, phi->regs_count == block->predecessors_count + 1);
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validate_src(ctx, phi->regs[1 + pred_idx]);
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validate_assert(ctx, phi->srcs_count == block->predecessors_count);
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validate_src(ctx, phi, phi->srcs[pred_idx]);
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}
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}
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@ -99,13 +112,11 @@ validate_phi(struct ir3_validate_ctx *ctx, struct ir3_instruction *phi)
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}
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static void
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validate_reg(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr,
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validate_dst(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr,
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struct ir3_register *reg)
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{
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if (reg->tied) {
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validate_assert(ctx, reg->tied->tied == reg);
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validate_assert(ctx, (reg->tied->flags & IR3_REG_DEST) !=
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(reg->flags & IR3_REG_DEST));
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validate_assert(ctx, reg_class_flags(reg->tied) == reg_class_flags(reg));
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validate_assert(ctx, reg->tied->wrmask == reg->wrmask);
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if (reg->flags & IR3_REG_ARRAY) {
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@ -113,8 +124,8 @@ validate_reg(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr,
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validate_assert(ctx, reg->tied->size == reg->size);
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}
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bool found = false;
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for (unsigned i = 0; i < instr->regs_count; i++) {
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if (instr->regs[i] == reg->tied) {
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for (unsigned i = 0; i < instr->srcs_count; i++) {
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if (instr->srcs[i] == reg->tied) {
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found = true;
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break;
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}
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@ -122,7 +133,7 @@ validate_reg(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr,
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validate_assert(ctx, found && "tied register not in the same instruction");
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}
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if ((reg->flags & IR3_REG_DEST) && (reg->flags & IR3_REG_SSA))
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if (reg->flags & IR3_REG_SSA)
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validate_assert(ctx, reg->instr == instr);
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}
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@ -135,7 +146,7 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
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struct ir3_register *last_reg = NULL;
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if (writes_gpr(instr)) {
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if (instr->regs[0]->flags & IR3_REG_RELATIV) {
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if (instr->dsts[0]->flags & IR3_REG_RELATIV) {
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validate_assert(ctx, instr->address);
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}
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}
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@ -144,7 +155,7 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
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if (reg->flags & IR3_REG_RELATIV)
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validate_assert(ctx, instr->address);
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validate_src(ctx, reg);
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validate_src(ctx, instr, reg);
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/* Validate that all src's are either half of full.
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*
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@ -177,10 +188,10 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
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last_reg = reg;
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}
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for (unsigned i = 0; i < instr->regs_count; i++) {
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struct ir3_register *reg = instr->regs[i];
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for (unsigned i = 0; i < instr->dsts_count; i++) {
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struct ir3_register *reg = instr->dsts[i];
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validate_reg(ctx, instr, reg);
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validate_dst(ctx, instr, reg);
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}
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_mesa_set_add(ctx->defs, instr);
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@ -192,20 +203,21 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
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switch (opc_cat(instr->opc)) {
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case 1: /* move instructions */
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if (instr->opc == OPC_MOVMSK) {
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validate_assert(ctx, instr->regs_count == 1);
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validate_assert(ctx, instr->regs[0]->flags & IR3_REG_SHARED);
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validate_assert(ctx, !(instr->regs[0]->flags & IR3_REG_HALF));
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validate_assert(ctx, util_is_power_of_two_or_zero(instr->regs[0]->wrmask + 1));
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validate_assert(ctx, instr->dsts_count == 1);
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validate_assert(ctx, instr->srcs_count == 0);
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validate_assert(ctx, instr->dsts[0]->flags & IR3_REG_SHARED);
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validate_assert(ctx, !(instr->dsts[0]->flags & IR3_REG_HALF));
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validate_assert(ctx, util_is_power_of_two_or_zero(instr->dsts[0]->wrmask + 1));
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} else {
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validate_reg_size(ctx, instr->regs[0], instr->cat1.dst_type);
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validate_reg_size(ctx, instr->regs[1], instr->cat1.src_type);
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validate_reg_size(ctx, instr->dsts[0], instr->cat1.dst_type);
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validate_reg_size(ctx, instr->srcs[0], instr->cat1.src_type);
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}
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break;
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case 3:
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/* Validate that cat3 opc matches the src type. We've already checked that all
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* the src regs are same type
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*/
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if (instr->regs[1]->flags & IR3_REG_HALF) {
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if (instr->srcs[0]->flags & IR3_REG_HALF) {
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validate_assert(ctx, instr->opc == cat3_half_opc(instr->opc));
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} else {
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validate_assert(ctx, instr->opc == cat3_full_opc(instr->opc));
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@ -213,51 +225,51 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
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break;
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case 4:
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/* Validate that cat4 opc matches the dst type: */
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if (instr->regs[0]->flags & IR3_REG_HALF) {
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if (instr->dsts[0]->flags & IR3_REG_HALF) {
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validate_assert(ctx, instr->opc == cat4_half_opc(instr->opc));
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} else {
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validate_assert(ctx, instr->opc == cat4_full_opc(instr->opc));
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}
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break;
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case 5:
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validate_reg_size(ctx, instr->regs[0], instr->cat5.type);
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validate_reg_size(ctx, instr->dsts[0], instr->cat5.type);
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break;
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case 6:
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switch (instr->opc) {
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case OPC_RESINFO:
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case OPC_RESFMT:
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validate_reg_size(ctx, instr->regs[0], instr->cat6.type);
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validate_reg_size(ctx, instr->regs[1], instr->cat6.type);
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validate_reg_size(ctx, instr->dsts[0], instr->cat6.type);
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validate_reg_size(ctx, instr->srcs[0], instr->cat6.type);
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break;
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case OPC_L2G:
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case OPC_G2L:
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validate_assert(ctx, !(instr->regs[0]->flags & IR3_REG_HALF));
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validate_assert(ctx, !(instr->regs[1]->flags & IR3_REG_HALF));
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validate_assert(ctx, !(instr->dsts[0]->flags & IR3_REG_HALF));
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validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
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break;
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case OPC_STG:
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case OPC_STL:
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case OPC_STP:
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case OPC_STLW:
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validate_assert(ctx, !(instr->regs[1]->flags & IR3_REG_HALF));
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validate_reg_size(ctx, instr->regs[2], instr->cat6.type);
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validate_assert(ctx, !(instr->regs[3]->flags & IR3_REG_HALF));
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validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
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validate_reg_size(ctx, instr->srcs[1], instr->cat6.type);
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validate_assert(ctx, !(instr->srcs[2]->flags & IR3_REG_HALF));
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break;
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case OPC_STIB:
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if (instr->flags & IR3_INSTR_B) {
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validate_assert(ctx, !(instr->regs[1]->flags & IR3_REG_HALF));
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validate_assert(ctx, !(instr->regs[2]->flags & IR3_REG_HALF));
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validate_reg_size(ctx, instr->regs[3], instr->cat6.type);
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validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
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validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF));
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validate_reg_size(ctx, instr->srcs[2], instr->cat6.type);
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} else {
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validate_assert(ctx, !(instr->regs[1]->flags & IR3_REG_HALF));
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validate_reg_size(ctx, instr->regs[2], instr->cat6.type);
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validate_assert(ctx, !(instr->regs[3]->flags & IR3_REG_HALF));
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validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
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validate_reg_size(ctx, instr->srcs[1], instr->cat6.type);
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validate_assert(ctx, !(instr->srcs[2]->flags & IR3_REG_HALF));
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}
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break;
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default:
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validate_reg_size(ctx, instr->regs[0], instr->cat6.type);
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validate_assert(ctx, !(instr->regs[1]->flags & IR3_REG_HALF));
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if (instr->regs_count > 2)
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validate_assert(ctx, !(instr->regs[2]->flags & IR3_REG_HALF));
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validate_reg_size(ctx, instr->dsts[0], instr->cat6.type);
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validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
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if (instr->srcs_count > 1)
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validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF));
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break;
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}
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}
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