intel/genxml: Fix Indirect Object Access Upper Bound on Gfx4
We had this field mislabeled as "Instruction Access Upper Bound", but instruction state base address doesn't exist until Gfx5. This is supposed to be the upper bound for indirect object base address, matching the G45 copy. Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13480>
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@ -936,8 +936,8 @@
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<field name="Indirect Object Base Address" start="108" end="127" type="address"/>
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<field name="General State Access Upper Bound Modify Enable" start="128" end="128" type="bool"/>
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<field name="General State Access Upper Bound" start="140" end="159" type="address"/>
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<field name="Instruction Access Upper Bound Modify Enable" start="160" end="160" type="bool"/>
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<field name="Instruction Access Upper Bound" start="172" end="191" type="address"/>
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<field name="Indirect Object Access Upper Bound Modify Enable" start="160" end="160" type="bool"/>
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<field name="Indirect Object Access Upper Bound" start="172" end="191" type="address"/>
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</instruction>
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<instruction name="STATE_SIP" bias="2" length="2" engine="render">
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