mesa/ati_fs: Clean up writemask handling.
Just put it into the op in core Mesa and explain what it's doing. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8118>
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@ -109,8 +109,9 @@ static void r200SetFragShaderArg( GLuint *afs_cmd, GLuint opnum, GLuint optype,
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SET_INST_2(opnum, optype) |= reg2;
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}
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static GLuint dstmask_table[8] =
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static GLuint dstmask_table[9] =
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{
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/* first slot never used, GL_NONE translated to RGB by mesa and you can't get a 0 dstmask. */
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R200_TXC_OUTPUT_MASK_RGB,
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R200_TXC_OUTPUT_MASK_R,
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R200_TXC_OUTPUT_MASK_G,
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@ -118,7 +119,8 @@ static GLuint dstmask_table[8] =
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R200_TXC_OUTPUT_MASK_B,
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R200_TXC_OUTPUT_MASK_RB,
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R200_TXC_OUTPUT_MASK_GB,
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R200_TXC_OUTPUT_MASK_RGB
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R200_TXC_OUTPUT_MASK_RGB,
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R200_TXC_OUTPUT_MASK_RGB, /* alpha ops */
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};
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static void r200UpdateFSArith( struct gl_context *ctx )
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@ -30,6 +30,7 @@
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#include "main/mtypes.h"
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#include "main/atifragshader.h"
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#include "program/program.h"
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#include "program/prog_instruction.h"
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#include "util/u_memory.h"
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#define MESA_DEBUG_ATI_FS 0
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@ -711,6 +712,21 @@ _mesa_FragmentOpXATI(GLint optype, GLuint arg_count, GLenum op, GLuint dst,
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curI->DstReg[optype].Index = dst;
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curI->DstReg[optype].dstMod = dstMod;
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/* From the ATI_fs spec:
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*
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* "The <dstMask> parameter specifies which of the color components in
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* <dst> will be written (ColorFragmentOp[1..3]ATI only). This can
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* either be NONE, in which case there is no mask and everything is
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* written, or the bitwise-or of RED_BIT_ATI, GREEN_BIT_ATI, and
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* BLUE_BIT_ATI."
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*
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* For AlphaFragmentOp, it always writes alpha.
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*/
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if (optype == ATI_FRAGMENT_SHADER_ALPHA_OP)
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curI->DstReg[optype].dstMask = WRITEMASK_W;
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else if (dstMask == GL_NONE)
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curI->DstReg[optype].dstMask = WRITEMASK_XYZ;
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else
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curI->DstReg[optype].dstMask = dstMask;
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#if MESA_DEBUG_ATI_FS
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@ -377,16 +377,7 @@ compile_instruction(struct st_translate *t,
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/* prepare dst */
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dst[0] = get_temp(t, dstreg);
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if (optype) {
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dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_W);
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} else {
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GLuint dstMask = inst->DstReg[optype].dstMask;
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if (dstMask == GL_NONE) {
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dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ);
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} else {
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dst[0] = ureg_writemask(dst[0], dstMask); /* the enum values match */
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}
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}
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dst[0] = ureg_writemask(dst[0], inst->DstReg[optype].dstMask);
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/* emit the main instruction */
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emit_arith_inst(t, desc, dst, args, arg);
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