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gallium/radeon: add separate stencil level dirty flags 

We will only do depth-only or stencil-only decompress blits, whichever is
needed by textures, instead of always doing both.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák 2015-09-06 17:35:06 +02:00
parent cc92b90375
commit 5804c6adf8
6 changed files with 12 additions and 5 deletions
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4
src/gallium/drivers/r600/evergreen_state.c
View File

@ -3375,11 +3375,11 @@ static void evergreen_dma_copy(struct pipe_context *ctx,
}
if (src->format != dst->format || src_box->depth > 1 ||
rdst->dirty_level_mask != 0) {
(rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level)) {
goto fallback;
}
if (rsrc->dirty_level_mask) {
if (rsrc->dirty_level_mask & (1 << src_level)) {
ctx->flush_resource(ctx, src);
}

3
src/gallium/drivers/r600/r600_state_common.c
View File

@ -1779,6 +1779,9 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
struct r600_texture *rtex = (struct r600_texture *)surf->texture;
rtex->dirty_level_mask |= 1 << surf->u.tex.level;
if (rtex->surface.flags & RADEON_SURF_SBUFFER)
rtex->stencil_dirty_level_mask |= 1 << surf->u.tex.level;
}
if (rctx->framebuffer.compressed_cb_mask) {
struct pipe_surface *surf;

1
src/gallium/drivers/radeon/r600_pipe_common.h
View File

@ -205,6 +205,7 @@ struct r600_texture {
unsigned pitch_override;
bool is_depth;
unsigned dirty_level_mask; /* each bit says if that mipmap is compressed */
unsigned stencil_dirty_level_mask; /* each bit says if that mipmap is compressed */
struct r600_texture *flushed_depth_texture;
boolean is_flushing_texture;
struct radeon_surf surface;

2
src/gallium/drivers/radeonsi/cik_sdma.c
View File

@ -242,7 +242,7 @@ void cik_sdma_copy(struct pipe_context *ctx,
if (src->format != dst->format ||
rdst->surface.nsamples > 1 || rsrc->surface.nsamples > 1 ||
rdst->dirty_level_mask & (1 << dst_level)) {
(rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level)) {
goto fallback;
}

4
src/gallium/drivers/radeonsi/si_dma.c
View File

@ -246,13 +246,13 @@ void si_dma_copy(struct pipe_context *ctx,
goto fallback;
if (src->format != dst->format || src_box->depth > 1 ||
rdst->dirty_level_mask != 0 ||
(rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level) ||
rdst->cmask.size || rdst->fmask.size ||
rsrc->cmask.size || rsrc->fmask.size) {
goto fallback;
}
if (rsrc->dirty_level_mask) {
if (rsrc->dirty_level_mask & (1 << src_level)) {
ctx->flush_resource(ctx, src);
}

3
src/gallium/drivers/radeonsi/si_state_draw.c
View File

@ -858,6 +858,9 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
struct r600_texture *rtex = (struct r600_texture *)surf->texture;
rtex->dirty_level_mask |= 1 << surf->u.tex.level;
if (rtex->surface.flags & RADEON_SURF_SBUFFER)
rtex->stencil_dirty_level_mask |= 1 << surf->u.tex.level;
}
if (sctx->framebuffer.compressed_cb_mask) {
struct pipe_surface *surf;