radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
This commit is contained in:
parent
eced536ed6
commit
5777488406
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@ -1,6 +1,5 @@
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C_SOURCES := \
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C_SOURCES := \
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r600_buffer_common.c \
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r600_buffer_common.c \
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r600_cs.h \
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r600_gpu_load.c \
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r600_gpu_load.c \
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r600_perfcounter.c \
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r600_perfcounter.c \
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r600_pipe_common.h \
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r600_pipe_common.h \
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@ -23,7 +23,6 @@
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*/
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*/
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#include "radeonsi/si_pipe.h"
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#include "radeonsi/si_pipe.h"
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#include "r600_cs.h"
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#include "util/u_memory.h"
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#include "util/u_memory.h"
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#include "util/u_upload_mgr.h"
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#include "util/u_upload_mgr.h"
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#include <inttypes.h>
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#include <inttypes.h>
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@ -26,7 +26,6 @@
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#include "radeonsi/si_pipe.h"
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#include "radeonsi/si_pipe.h"
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#include "r600_query.h"
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#include "r600_query.h"
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#include "r600_cs.h"
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#include "util/u_memory.h"
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#include "util/u_memory.h"
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#include "util/u_upload_mgr.h"
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#include "util/u_upload_mgr.h"
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#include "util/os_time.h"
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#include "util/os_time.h"
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@ -24,7 +24,6 @@
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*/
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*/
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#include "radeonsi/si_pipe.h"
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#include "radeonsi/si_pipe.h"
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#include "r600_cs.h"
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#include "r600_query.h"
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#include "r600_query.h"
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#include "util/u_format.h"
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#include "util/u_format.h"
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#include "util/u_log.h"
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#include "util/u_log.h"
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@ -26,90 +26,11 @@
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* This file contains helpers for writing commands to commands streams.
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* This file contains helpers for writing commands to commands streams.
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*/
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*/
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#ifndef R600_CS_H
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#ifndef SI_BUILD_PM4_H
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#define R600_CS_H
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#define SI_BUILD_PM4_H
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#include "radeonsi/si_pipe.h"
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#include "si_pipe.h"
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#include "amd/common/sid.h"
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#include "sid.h"
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/**
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* Return true if there is enough memory in VRAM and GTT for the buffers
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* added so far.
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*
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* \param vram VRAM memory size not added to the buffer list yet
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* \param gtt GTT memory size not added to the buffer list yet
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*/
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static inline bool
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radeon_cs_memory_below_limit(struct si_screen *screen,
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struct radeon_winsys_cs *cs,
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uint64_t vram, uint64_t gtt)
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{
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vram += cs->used_vram;
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gtt += cs->used_gart;
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/* Anything that goes above the VRAM size should go to GTT. */
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if (vram > screen->info.vram_size)
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gtt += vram - screen->info.vram_size;
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/* Now we just need to check if we have enough GTT. */
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return gtt < screen->info.gart_size * 0.7;
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}
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/**
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* Add a buffer to the buffer list for the given command stream (CS).
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*
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* All buffers used by a CS must be added to the list. This tells the kernel
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* driver which buffers are used by GPU commands. Other buffers can
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* be swapped out (not accessible) during execution.
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*
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* The buffer list becomes empty after every context flush and must be
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* rebuilt.
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*/
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static inline void radeon_add_to_buffer_list(struct si_context *sctx,
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struct radeon_winsys_cs *cs,
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struct r600_resource *rbo,
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enum radeon_bo_usage usage,
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enum radeon_bo_priority priority)
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{
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assert(usage);
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sctx->b.ws->cs_add_buffer(
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cs, rbo->buf,
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(enum radeon_bo_usage)(usage | RADEON_USAGE_SYNCHRONIZED),
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rbo->domains, priority);
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}
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/**
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* Same as above, but also checks memory usage and flushes the context
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* accordingly.
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*
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* When this SHOULD NOT be used:
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*
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* - if si_context_add_resource_size has been called for the buffer
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* followed by *_need_cs_space for checking the memory usage
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*
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* - if si_need_dma_space has been called for the buffer
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*
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* - when emitting state packets and draw packets (because preceding packets
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* can't be re-emitted at that point)
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*
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* - if shader resource "enabled_mask" is not up-to-date or there is
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* a different constraint disallowing a context flush
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*/
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static inline void
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radeon_add_to_gfx_buffer_list_check_mem(struct si_context *sctx,
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struct r600_resource *rbo,
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enum radeon_bo_usage usage,
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enum radeon_bo_priority priority,
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bool check_mem)
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{
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if (check_mem &&
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!radeon_cs_memory_below_limit(sctx->screen, sctx->b.gfx_cs,
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sctx->b.vram + rbo->vram_usage,
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sctx->b.gtt + rbo->gart_usage))
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si_flush_gfx_cs(sctx, PIPE_FLUSH_ASYNC, NULL);
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radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, rbo, usage, priority);
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}
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static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
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static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
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{
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{
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@ -29,10 +29,8 @@
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#include "util/u_upload_mgr.h"
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#include "util/u_upload_mgr.h"
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#include "amd_kernel_code_t.h"
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#include "amd_kernel_code_t.h"
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#include "radeon/r600_cs.h"
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#include "si_build_pm4.h"
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#include "si_pipe.h"
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#include "si_compute.h"
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#include "si_compute.h"
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#include "sid.h"
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#define COMPUTE_DBG(rscreen, fmt, args...) \
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#define COMPUTE_DBG(rscreen, fmt, args...) \
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do { \
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do { \
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#include "si_pipe.h"
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#include "si_pipe.h"
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#include "sid.h"
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#include "sid.h"
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#include "radeon/r600_cs.h"
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/* Recommended maximum sizes for optimal performance.
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/* Recommended maximum sizes for optimal performance.
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* Fall back to compute or SDMA if the size is greater.
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* Fall back to compute or SDMA if the size is greater.
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@ -53,7 +53,6 @@
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* Sampler states are never unbound except when FMASK is bound.
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* Sampler states are never unbound except when FMASK is bound.
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*/
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*/
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#include "radeon/r600_cs.h"
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#include "si_pipe.h"
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#include "si_pipe.h"
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#include "sid.h"
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#include "sid.h"
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#include "gfx9d.h"
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#include "gfx9d.h"
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@ -23,7 +23,6 @@
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*/
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*/
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#include "si_pipe.h"
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#include "si_pipe.h"
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#include "radeon/r600_cs.h"
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static void si_dma_emit_wait_idle(struct si_context *sctx)
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static void si_dma_emit_wait_idle(struct si_context *sctx)
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{
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{
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@ -30,8 +30,7 @@
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#include "util/u_queue.h"
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#include "util/u_queue.h"
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#include "util/u_upload_mgr.h"
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#include "util/u_upload_mgr.h"
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#include "si_pipe.h"
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#include "si_build_pm4.h"
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#include "radeon/r600_cs.h"
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struct si_fine_fence {
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struct si_fine_fence {
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struct r600_resource *buf;
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struct r600_resource *buf;
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*/
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*/
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#include "si_pipe.h"
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#include "si_pipe.h"
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#include "radeon/r600_cs.h"
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#include "util/os_time.h"
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#include "util/os_time.h"
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* SOFTWARE.
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* SOFTWARE.
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*/
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*/
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#include "radeon/r600_cs.h"
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#include "si_build_pm4.h"
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#include "radeon/r600_query.h"
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#include "radeon/r600_query.h"
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#include "util/u_memory.h"
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#include "util/u_memory.h"
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#include "si_pipe.h"
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#include "sid.h"
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enum si_pc_reg_layout {
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enum si_pc_reg_layout {
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/* All secondary selector dwords follow as one block after the primary
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/* All secondary selector dwords follow as one block after the primary
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@ -1063,6 +1063,85 @@ static inline unsigned si_get_total_colormask(struct si_context *sctx)
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return colormask;
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return colormask;
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}
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}
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/**
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* Return true if there is enough memory in VRAM and GTT for the buffers
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* added so far.
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*
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* \param vram VRAM memory size not added to the buffer list yet
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* \param gtt GTT memory size not added to the buffer list yet
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*/
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static inline bool
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radeon_cs_memory_below_limit(struct si_screen *screen,
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struct radeon_winsys_cs *cs,
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uint64_t vram, uint64_t gtt)
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{
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vram += cs->used_vram;
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gtt += cs->used_gart;
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/* Anything that goes above the VRAM size should go to GTT. */
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if (vram > screen->info.vram_size)
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gtt += vram - screen->info.vram_size;
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/* Now we just need to check if we have enough GTT. */
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return gtt < screen->info.gart_size * 0.7;
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}
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/**
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* Add a buffer to the buffer list for the given command stream (CS).
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*
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* All buffers used by a CS must be added to the list. This tells the kernel
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* driver which buffers are used by GPU commands. Other buffers can
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* be swapped out (not accessible) during execution.
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*
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* The buffer list becomes empty after every context flush and must be
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* rebuilt.
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*/
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static inline void radeon_add_to_buffer_list(struct si_context *sctx,
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struct radeon_winsys_cs *cs,
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struct r600_resource *rbo,
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enum radeon_bo_usage usage,
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enum radeon_bo_priority priority)
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{
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assert(usage);
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sctx->b.ws->cs_add_buffer(
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cs, rbo->buf,
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(enum radeon_bo_usage)(usage | RADEON_USAGE_SYNCHRONIZED),
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rbo->domains, priority);
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}
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/**
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* Same as above, but also checks memory usage and flushes the context
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* accordingly.
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*
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* When this SHOULD NOT be used:
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*
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* - if si_context_add_resource_size has been called for the buffer
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* followed by *_need_cs_space for checking the memory usage
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*
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* - if si_need_dma_space has been called for the buffer
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*
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* - when emitting state packets and draw packets (because preceding packets
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* can't be re-emitted at that point)
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*
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* - if shader resource "enabled_mask" is not up-to-date or there is
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* a different constraint disallowing a context flush
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*/
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static inline void
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radeon_add_to_gfx_buffer_list_check_mem(struct si_context *sctx,
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struct r600_resource *rbo,
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enum radeon_bo_usage usage,
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enum radeon_bo_priority priority,
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bool check_mem)
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{
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if (check_mem &&
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!radeon_cs_memory_below_limit(sctx->screen, sctx->b.gfx_cs,
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sctx->b.vram + rbo->vram_usage,
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sctx->b.gtt + rbo->gart_usage))
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si_flush_gfx_cs(sctx, PIPE_FLUSH_ASYNC, NULL);
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radeon_add_to_buffer_list(sctx, sctx->b.gfx_cs, rbo, usage, priority);
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}
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#define PRINT_ERR(fmt, args...) \
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#define PRINT_ERR(fmt, args...) \
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fprintf(stderr, "EE %s:%d %s - " fmt, __FILE__, __LINE__, __func__, ##args)
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fprintf(stderr, "EE %s:%d %s - " fmt, __FILE__, __LINE__, __func__, ##args)
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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*/
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#include "radeon/r600_cs.h"
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#include "util/u_memory.h"
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#include "util/u_memory.h"
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#include "si_pipe.h"
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#include "si_pipe.h"
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#include "sid.h"
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#include "sid.h"
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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*/
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#include "si_pipe.h"
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#include "si_build_pm4.h"
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#include "sid.h"
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#include "gfx9d.h"
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#include "gfx9d.h"
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#include "radeon/r600_cs.h"
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#include "radeon/r600_query.h"
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#include "radeon/r600_query.h"
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#include "util/u_dual_blend.h"
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#include "util/u_dual_blend.h"
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/* This file handles register programming of primitive binning. */
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/* This file handles register programming of primitive binning. */
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#include "si_pipe.h"
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#include "si_build_pm4.h"
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#include "sid.h"
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#include "gfx9d.h"
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#include "gfx9d.h"
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#include "radeon/r600_cs.h"
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struct uvec2 {
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struct uvec2 {
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unsigned x, y;
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unsigned x, y;
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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*/
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#include "si_pipe.h"
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#include "si_build_pm4.h"
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#include "radeon/r600_cs.h"
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#include "sid.h"
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#include "gfx9d.h"
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#include "gfx9d.h"
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#include "util/u_index_modify.h"
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#include "util/u_index_modify.h"
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@ -22,9 +22,7 @@
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* SOFTWARE.
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* SOFTWARE.
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*/
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*/
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#include "si_pipe.h"
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#include "si_build_pm4.h"
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#include "sid.h"
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#include "radeon/r600_cs.h"
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/* For MSAA sample positions. */
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/* For MSAA sample positions. */
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#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
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#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \
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@ -22,10 +22,8 @@
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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*/
|
||||||
|
|
||||||
#include "si_pipe.h"
|
#include "si_build_pm4.h"
|
||||||
#include "sid.h"
|
|
||||||
#include "gfx9d.h"
|
#include "gfx9d.h"
|
||||||
#include "radeon/r600_cs.h"
|
|
||||||
|
|
||||||
#include "compiler/nir/nir_serialize.h"
|
#include "compiler/nir/nir_serialize.h"
|
||||||
#include "tgsi/tgsi_parse.h"
|
#include "tgsi/tgsi_parse.h"
|
||||||
|
|
|
@ -22,10 +22,7 @@
|
||||||
* SOFTWARE.
|
* SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "si_pipe.h"
|
#include "si_build_pm4.h"
|
||||||
#include "si_state.h"
|
|
||||||
#include "sid.h"
|
|
||||||
#include "radeon/r600_cs.h"
|
|
||||||
|
|
||||||
#include "util/u_memory.h"
|
#include "util/u_memory.h"
|
||||||
|
|
||||||
|
|
|
@ -22,9 +22,7 @@
|
||||||
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
* USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "si_pipe.h"
|
#include "si_build_pm4.h"
|
||||||
#include "sid.h"
|
|
||||||
#include "radeon/r600_cs.h"
|
|
||||||
#include "util/u_viewport.h"
|
#include "util/u_viewport.h"
|
||||||
#include "tgsi/tgsi_scan.h"
|
#include "tgsi/tgsi_scan.h"
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue