r600g,radeonsi: Set RADEON_GEM_NO_CPU_ACCESS flag for tiled BOs

This lets the kernel know that such BOs can be pinned outside of the CPU
accessible part of VRAM.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Michel Dänzer 2014-09-09 09:55:07 +09:00 committed by Michel Dänzer
parent 720cfb6fe9
commit 5679ccfcaf
3 changed files with 13 additions and 5 deletions

View File

@ -156,6 +156,7 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D) {
res->domains = RADEON_DOMAIN_VRAM;
flags &= ~RADEON_FLAG_CPU_ACCESS;
flags |= RADEON_FLAG_NO_CPU_ACCESS;
}
/* Allocate a new resource. */

View File

@ -477,11 +477,15 @@ const struct pb_vtbl radeon_bo_vtbl = {
};
#ifndef RADEON_GEM_GTT_WC
#define RADEON_GEM_GTT_WC (1 << 2)
#define RADEON_GEM_GTT_WC (1 << 2)
#endif
#ifndef RADEON_GTM_CPU_ACCESS
#ifndef RADEON_GEM_CPU_ACCESS
/* BO is expected to be accessed by the CPU */
#define RADEON_GEM_CPU_ACCESS (1 << 3)
#define RADEON_GEM_CPU_ACCESS (1 << 3)
#endif
#ifndef RADEON_GEM_NO_CPU_ACCESS
/* CPU access is not expected to work for this BO */
#define RADEON_GEM_NO_CPU_ACCESS (1 << 4)
#endif
static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
@ -510,6 +514,8 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
args.flags |= RADEON_GEM_GTT_WC;
if (rdesc->flags & RADEON_FLAG_CPU_ACCESS)
args.flags |= RADEON_GEM_CPU_ACCESS;
if (rdesc->flags & RADEON_FLAG_NO_CPU_ACCESS)
args.flags |= RADEON_GEM_NO_CPU_ACCESS;
if (drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_CREATE,
&args, sizeof(args))) {

View File

@ -66,8 +66,9 @@ enum radeon_bo_domain { /* bitfield */
};
enum radeon_bo_flag { /* bitfield */
RADEON_FLAG_GTT_WC = (1 << 0),
RADEON_FLAG_CPU_ACCESS = (1 << 1),
RADEON_FLAG_GTT_WC = (1 << 0),
RADEON_FLAG_CPU_ACCESS = (1 << 1),
RADEON_FLAG_NO_CPU_ACCESS = (1 << 2),
};
enum radeon_bo_usage { /* bitfield */