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radeonsi: Fix imports with displayable DCC. 

Otherwise we reset the displayable DCC on import.

Fixes: c6c1fa9a26 "radeonsi: Put retile map in separate buffers."
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3577
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6918>
This commit is contained in:
Bas Nieuwenhuizen 2020-09-29 18:41:31 +02:00 committed by Marge Bot
parent 636f770233
commit 55e2b3424d
1 changed files with 6 additions and 4 deletions
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10
src/gallium/drivers/radeonsi/si_texture.c
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@ -1152,10 +1152,12 @@ static struct si_texture *si_texture_create_object(struct pipe_screen *screen,
/* Initialize displayable DCC that requires the retile blit. */
if (tex->surface.display_dcc_offset) {
/* Uninitialized DCC can hang the display hw.
* Clear to white to indicate that. */
si_screen_clear_buffer(sscreen, &tex->buffer.b.b, tex->surface.display_dcc_offset,
tex->surface.u.gfx9.display_dcc_size, DCC_CLEAR_COLOR_1111);
if (!(surface->flags & RADEON_SURF_IMPORTED)) {
/* Uninitialized DCC can hang the display hw.
* Clear to white to indicate that. */
si_screen_clear_buffer(sscreen, &tex->buffer.b.b, tex->surface.display_dcc_offset,
tex->surface.u.gfx9.display_dcc_size, DCC_CLEAR_COLOR_1111);
}
/* Upload the DCC retile map.
* Use a staging buffer for the upload, because