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freedreno/ir3: Leave the cursor alone during ir3_nir_try_propagate_bit_shift. 

Otherwise, we might end up inserting the nir_intrinsic_load_ubo_ir3()
after the non-offset src's definition, leading to nir_validate() failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4858>
This commit is contained in:
Eric Anholt 2020-04-20 17:14:53 -07:00 committed by Marge Bot
parent e0a4d1c4e5
commit 5387c27140
1 changed files with 2 additions and 4 deletions
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6
src/freedreno/ir3/ir3_nir_lower_io_offsets.c
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@ -132,8 +132,6 @@ ir3_nir_try_propagate_bit_shift(nir_builder *b, nir_ssa_def *offset, int32_t shi
nir_ssa_def *shift_ssa;
nir_ssa_def *new_offset = NULL;
b->cursor = nir_after_instr(&alu->instr);
/* the first src could be something like ssa_18.x, but we only want
* the single component. Otherwise the ishl/ishr/ushr could turn
* into a vec4 operation:
@ -183,6 +181,8 @@ lower_offset_for_ssbo(nir_intrinsic_instr *intrinsic, nir_builder *b,
nir_intrinsic_instr *new_intrinsic;
nir_src *target_src;
b->cursor = nir_before_instr(&intrinsic->instr);
/* 'offset_src_idx' holds the index of the source that represent the offset. */
new_intrinsic =
nir_intrinsic_instr_create(b->shader, ir3_ssbo_opcode);
@ -222,8 +222,6 @@ lower_offset_for_ssbo(nir_intrinsic_instr *intrinsic, nir_builder *b,
new_intrinsic->num_components = intrinsic->num_components;
b->cursor = nir_before_instr(&intrinsic->instr);
/* If we managed to propagate the division by 4, just use the new offset
* register and don't emit the SHR.
*/