From 5318870f5457104aae87d7cd81b347e1aea231ea Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Christian=20K=C3=B6nig?= Date: Tue, 23 May 2017 18:40:18 +0200 Subject: [PATCH] winsys/amdgpu: align VA allocations to fragment size v2 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit BOs larger than the minimum fragment size should have their VA alignet to at least the fragment size for optimal performance. v2: drop unused leftover from initial implementation Signed-off-by: Christian König Reviewed-by: Marek Olšák --- src/amd/common/ac_gpu_info.c | 1 + src/amd/common/ac_gpu_info.h | 1 + src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 2 ++ 3 files changed, 4 insertions(+) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index cf5d6e1d8ca..0b4933e174b 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -281,6 +281,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, memcpy(info->cik_macrotile_mode_array, amdinfo->gb_macro_tile_mode, sizeof(amdinfo->gb_macro_tile_mode)); + info->pte_fragment_size = alignment_info.size_local; info->gart_page_size = alignment_info.size_remote; if (info->chip_class == SI) diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index d8029ef175b..3785eb4d164 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -45,6 +45,7 @@ struct radeon_info { uint32_t pci_id; enum radeon_family family; enum chip_class chip_class; + uint32_t pte_fragment_size; uint32_t gart_page_size; uint64_t gart_size; uint64_t vram_size; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index 6bdcce53dc8..401741167a3 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -415,6 +415,8 @@ static struct amdgpu_winsys_bo *amdgpu_create_bo(struct amdgpu_winsys *ws, } va_gap_size = ws->check_vm ? MAX2(4 * alignment, 64 * 1024) : 0; + if (size > ws->info.pte_fragment_size) + alignment = MAX2(alignment, ws->info.pte_fragment_size); r = amdgpu_va_range_alloc(ws->dev, amdgpu_gpu_va_range_general, size + va_gap_size, alignment, 0, &va, &va_handle, 0); if (r)