radeonsi/vcn: prepare for unified queue in vcn4

- apply unified queue ib headers to vcn4
  - re-use encoding queue as unified queue
  - define unified queue functions and structures

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16911>

src/amd/common/ac_gpu_info.c

@@ -823,7 +823,12 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
    info->uvd_fw_version = info->ip[AMD_IP_UVD].num_queues ? uvd_version : 0;
    info->vce_fw_version = info->ip[AMD_IP_VCE].num_queues ? vce_version : 0;
    info->has_video_hw.uvd_decode = info->ip[AMD_IP_UVD].num_queues != 0;
-   info->has_video_hw.vcn_decode = info->ip[AMD_IP_VCN_DEC].num_queues != 0;
+
+   /* unified ring */
+   info->has_video_hw.vcn_decode
+                  = info->family >= CHIP_GFX1100
+                    ? info->ip[AMD_IP_VCN_UNIFIED].num_queues != 0
+                    : info->ip[AMD_IP_VCN_DEC].num_queues != 0;
    info->has_video_hw.jpeg_decode = info->ip[AMD_IP_VCN_JPEG].num_queues != 0;
    info->has_video_hw.vce_encode = info->ip[AMD_IP_VCE].num_queues != 0;
    info->has_video_hw.uvd_encode = info->ip[AMD_IP_UVD_ENC].num_queues != 0;
@@ -1334,6 +1339,9 @@ void ac_print_gpu_info(struct radeon_info *info, FILE *f)
       }
    }
 
+   if (info->family >= CHIP_GFX1100)
+      ip_string[AMD_IP_VCN_UNIFIED] = "VCN_UNIFIED";
+
    fprintf(f, "    has_graphics = %i\n", info->has_graphics);
    fprintf(f, "    has_clear_state = %u\n", info->has_clear_state);
    fprintf(f, "    has_distributed_tess = %u\n", info->has_distributed_tess);
@@ -1397,11 +1405,17 @@ void ac_print_gpu_info(struct radeon_info *info, FILE *f)
 
    fprintf(f, "Multimedia info:\n");
    fprintf(f, "    uvd_decode = %u\n", info->has_video_hw.uvd_decode);
-   fprintf(f, "    vcn_decode = %u\n", info->has_video_hw.vcn_decode);
    fprintf(f, "    jpeg_decode = %u\n", info->has_video_hw.jpeg_decode);
    fprintf(f, "    vce_encode = %u\n", info->has_video_hw.vce_encode);
    fprintf(f, "    uvd_encode = %u\n", info->has_video_hw.uvd_encode);
-   fprintf(f, "    vcn_encode = %u\n", info->has_video_hw.vcn_encode);
+
+   if (info->family >= CHIP_GFX1100)
+      fprintf(f, "    vcn_unified = %u\n", info->has_video_hw.vcn_decode);
+   else {
+      fprintf(f, "    vcn_decode = %u\n", info->has_video_hw.vcn_decode);
+      fprintf(f, "    vcn_encode = %u\n", info->has_video_hw.vcn_encode);
+   }
+
    fprintf(f, "    uvd_fw_version = %u\n", info->uvd_fw_version);
    fprintf(f, "    vce_fw_version = %u\n", info->vce_fw_version);
    fprintf(f, "    vce_harvest_config = %i\n", info->vce_harvest_config);

src/amd/common/amd_family.h

@@ -166,6 +166,7 @@ enum amd_ip_type
    AMD_IP_UVD_ENC,
    AMD_IP_VCN_DEC,
    AMD_IP_VCN_ENC,
+   AMD_IP_VCN_UNIFIED = AMD_IP_VCN_ENC,
    AMD_IP_VCN_JPEG,
    AMD_NUM_IP_TYPES,
 };

src/gallium/drivers/radeonsi/meson.build

@@ -85,6 +85,8 @@ files_libradeonsi = files(
   'radeon_vce_40_2_2.c',
   'radeon_vce_50.c',
   'radeon_vce_52.c',
+  'radeon_vcn.h',
+  'radeon_vcn.c',
   'radeon_vcn_av1_default.h',
   'radeon_vcn_dec.c',
   'radeon_vcn_dec.h',

src/gallium/drivers/radeonsi/radeon_vcn.c

@@ -0,0 +1,68 @@
+/*
+ * Copyright © 2022 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
+ * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ */
+
+#include "radeon_vcn.h"
+
+/* vcn unified queue (sq) ib header */
+void rvcn_sq_header(struct radeon_cmdbuf *cs,
+                    struct rvcn_sq_var *sq,
+                    bool enc)
+{
+   /* vcn ib signature */
+   radeon_emit(cs, RADEON_VCN_SIGNATURE_SIZE);
+   radeon_emit(cs, RADEON_VCN_SIGNATURE);
+   sq->ib_checksum = &cs->current.buf[cs->current.cdw];
+   radeon_emit(cs, 0);
+   sq->ib_total_size_in_dw = &cs->current.buf[cs->current.cdw];
+   radeon_emit(cs, 0);
+
+   /* vcn ib engine info */
+   radeon_emit(cs, RADEON_VCN_ENGINE_INFO_SIZE);
+   radeon_emit(cs, RADEON_VCN_ENGINE_INFO);
+   radeon_emit(cs, enc ? RADEON_VCN_ENGINE_TYPE_ENCODE
+                       : RADEON_VCN_ENGINE_TYPE_DECODE);
+   radeon_emit(cs, 0);
+}
+
+void rvcn_sq_tail(struct radeon_cmdbuf *cs,
+                  struct rvcn_sq_var *sq)
+{
+   uint32_t *end;
+   uint32_t size_in_dw;
+   uint32_t checksum = 0;
+
+   if (sq->ib_checksum == NULL || sq->ib_total_size_in_dw == NULL)
+      return;
+
+   end = &cs->current.buf[cs->current.cdw];
+   size_in_dw = end - sq->ib_total_size_in_dw - 1;
+   *sq->ib_total_size_in_dw = size_in_dw;
+   *(sq->ib_total_size_in_dw + 4) = size_in_dw * sizeof(uint32_t);
+
+   for (int i = 0; i < size_in_dw; i++)
+      checksum += *(sq->ib_checksum + 2 + i);
+
+   *sq->ib_checksum = checksum;
+}

src/gallium/drivers/radeonsi/radeon_vcn.h

@@ -0,0 +1,50 @@
+/*
+ * Copyright © 2022 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
+ * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ */
+
+#ifndef RADEON_VCN_H
+#define RADEON_VCN_H
+
+#include "radeon_video.h"
+
+#define RADEON_VCN_ENGINE_INFO                                        (0x30000001)
+#define RADEON_VCN_SIGNATURE                                          (0x30000002)
+#define RADEON_VCN_ENGINE_TYPE_ENCODE                                 (0x00000002)
+#define RADEON_VCN_ENGINE_TYPE_DECODE                                 (0x00000003)
+
+#define RADEON_VCN_ENGINE_INFO_SIZE                                   (0x00000010)
+#define RADEON_VCN_SIGNATURE_SIZE                                     (0x00000010)
+
+struct rvcn_sq_var {
+   unsigned int *ib_total_size_in_dw;
+   unsigned int *ib_checksum;
+};
+
+void rvcn_sq_header(struct radeon_cmdbuf *cs,
+                    struct rvcn_sq_var *sq,
+                    bool enc);
+
+void rvcn_sq_tail(struct radeon_cmdbuf *cs,
+                  struct rvcn_sq_var *sq);
+#endif

src/gallium/drivers/radeonsi/radeon_vcn_dec.h

@@ -28,7 +28,7 @@
 #ifndef _RADEON_VCN_DEC_H
 #define _RADEON_VCN_DEC_H
 
-#include "radeon_video.h"
+#include "radeon_vcn.h"
 #include "util/list.h"
 
 #include "ac_vcn_dec.h"
@@ -64,6 +64,7 @@ struct radeon_decoder {
    void *bs_ptr;
    rvcn_decode_buffer_t *decode_buffer;
    bool vcn_dec_sw_ring;
+   struct rvcn_sq_var sq;
 
    struct rvid_buffer msg_fb_it_probs_buffers[NUM_BUFFERS];
    struct rvid_buffer bs_buffers[NUM_BUFFERS];

src/gallium/drivers/radeonsi/radeon_vcn_enc.h

@@ -28,7 +28,7 @@
 #ifndef _RADEON_VCN_ENC_H
 #define _RADEON_VCN_ENC_H
 
-#include "radeon_video.h"
+#include "radeon_vcn.h"
 
 #define RENCODE_IB_OP_INITIALIZE                                                    0x01000001
 #define RENCODE_IB_OP_CLOSE_SESSION                                                 0x01000002
@@ -628,6 +628,7 @@ struct radeon_encoder {
    unsigned bits_size;
    uint32_t total_task_size;
    uint32_t *p_task_size;
+   struct rvcn_sq_var sq;
 
    bool emulation_prevention;
    bool need_feedback;