nir: Split nir_lower_io's input/output/atomic handling into helpers.
The original function was becoming a bit hard to read, with the details of creating and filling out load/store/atomic atomics all in one function. This patch makes helpers for creating each type of intrinsic, and also combines them with the *_op() helpers, as they're closely coupled and not too large. v2: Minor style nits from Jason. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
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@ -167,18 +167,22 @@ get_io_offset(nir_builder *b, nir_deref_var *deref,
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return offset;
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}
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static nir_intrinsic_op
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load_op(nir_variable_mode mode, bool per_vertex)
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static nir_intrinsic_instr *
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lower_load(nir_intrinsic_instr *intrin, struct lower_io_state *state,
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nir_ssa_def *vertex_index, nir_ssa_def *offset)
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{
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nir_variable *var = intrin->variables[0]->var;
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nir_variable_mode mode = var->data.mode;
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nir_intrinsic_op op;
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switch (mode) {
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case nir_var_shader_in:
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op = per_vertex ? nir_intrinsic_load_per_vertex_input :
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nir_intrinsic_load_input;
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op = vertex_index ? nir_intrinsic_load_per_vertex_input :
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nir_intrinsic_load_input;
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break;
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case nir_var_shader_out:
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op = per_vertex ? nir_intrinsic_load_per_vertex_output :
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nir_intrinsic_load_output;
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op = vertex_index ? nir_intrinsic_load_per_vertex_output :
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nir_intrinsic_load_output;
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break;
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case nir_var_uniform:
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op = nir_intrinsic_load_uniform;
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@ -189,33 +193,72 @@ load_op(nir_variable_mode mode, bool per_vertex)
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default:
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unreachable("Unknown variable mode");
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}
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return op;
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nir_intrinsic_instr *load = nir_intrinsic_instr_create(state->mem_ctx, op);
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load->num_components = intrin->num_components;
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nir_intrinsic_set_base(load, var->data.driver_location);
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if (mode == nir_var_shader_in || mode == nir_var_shader_out)
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nir_intrinsic_set_component(load, var->data.location_frac);
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if (load->intrinsic == nir_intrinsic_load_uniform)
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nir_intrinsic_set_range(load, state->type_size(var->type));
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if (vertex_index)
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load->src[0] = nir_src_for_ssa(vertex_index);
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load->src[vertex_index ? 1 : 0] = nir_src_for_ssa(offset);
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return load;
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}
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static nir_intrinsic_op
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store_op(struct lower_io_state *state,
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nir_variable_mode mode, bool per_vertex)
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static nir_intrinsic_instr *
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lower_store(nir_intrinsic_instr *intrin, struct lower_io_state *state,
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nir_ssa_def *vertex_index, nir_ssa_def *offset)
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{
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nir_variable *var = intrin->variables[0]->var;
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nir_variable_mode mode = var->data.mode;
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nir_intrinsic_op op;
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switch (mode) {
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case nir_var_shader_out:
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op = per_vertex ? nir_intrinsic_store_per_vertex_output :
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nir_intrinsic_store_output;
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break;
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case nir_var_shared:
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if (mode == nir_var_shared) {
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op = nir_intrinsic_store_shared;
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break;
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default:
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unreachable("Unknown variable mode");
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} else {
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assert(mode == nir_var_shader_out);
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op = vertex_index ? nir_intrinsic_store_per_vertex_output :
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nir_intrinsic_store_output;
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}
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return op;
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nir_intrinsic_instr *store = nir_intrinsic_instr_create(state->mem_ctx, op);
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store->num_components = intrin->num_components;
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nir_src_copy(&store->src[0], &intrin->src[0], store);
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nir_intrinsic_set_base(store, var->data.driver_location);
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if (mode == nir_var_shader_out)
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nir_intrinsic_set_component(store, var->data.location_frac);
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nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(intrin));
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if (vertex_index)
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store->src[1] = nir_src_for_ssa(vertex_index);
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store->src[vertex_index ? 2 : 1] = nir_src_for_ssa(offset);
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return store;
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}
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static nir_intrinsic_op
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atomic_op(nir_intrinsic_op opcode)
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static nir_intrinsic_instr *
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lower_atomic(nir_intrinsic_instr *intrin, struct lower_io_state *state,
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nir_ssa_def *offset)
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{
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switch (opcode) {
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#define OP(O) case nir_intrinsic_var_##O: return nir_intrinsic_shared_##O;
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nir_variable *var = intrin->variables[0]->var;
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assert(var->data.mode == nir_var_shared);
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nir_intrinsic_op op;
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switch (intrin->intrinsic) {
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#define OP(O) case nir_intrinsic_var_##O: op = nir_intrinsic_shared_##O; break;
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OP(atomic_exchange)
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OP(atomic_comp_swap)
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OP(atomic_add)
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@ -230,6 +273,18 @@ atomic_op(nir_intrinsic_op opcode)
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default:
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unreachable("Invalid atomic");
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}
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nir_intrinsic_instr *atomic =
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nir_intrinsic_instr_create(state->mem_ctx, op);
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atomic->src[0] = nir_src_for_ssa(offset);
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atomic->const_index[0] = var->data.driver_location;
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for (unsigned i = 0; i < nir_op_infos[intrin->intrinsic].num_inputs; i++) {
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nir_src_copy(&atomic->src[i+1], &intrin->src[i], atomic);
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}
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return atomic;
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}
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static bool
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@ -282,7 +337,7 @@ nir_lower_io_block(nir_block *block,
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is_per_vertex_input(state, var) || is_per_vertex_output(state, var);
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nir_ssa_def *offset;
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nir_ssa_def *vertex_index;
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nir_ssa_def *vertex_index = NULL;
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offset = get_io_offset(b, intrin->variables[0],
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per_vertex ? &vertex_index : NULL,
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@ -291,56 +346,13 @@ nir_lower_io_block(nir_block *block,
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nir_intrinsic_instr *replacement;
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_var: {
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nir_intrinsic_instr *load =
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nir_intrinsic_instr_create(state->mem_ctx,
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load_op(mode, per_vertex));
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load->num_components = intrin->num_components;
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nir_intrinsic_set_base(load,
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var->data.driver_location);
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if (mode == nir_var_shader_in || mode == nir_var_shader_out) {
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nir_intrinsic_set_component(load, var->data.location_frac);
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}
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if (load->intrinsic == nir_intrinsic_load_uniform) {
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nir_intrinsic_set_range(load, state->type_size(var->type));
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}
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if (per_vertex)
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load->src[0] = nir_src_for_ssa(vertex_index);
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load->src[per_vertex ? 1 : 0] = nir_src_for_ssa(offset);
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replacement = load;
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case nir_intrinsic_load_var:
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replacement = lower_load(intrin, state, vertex_index, offset);
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break;
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}
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case nir_intrinsic_store_var: {
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assert(mode == nir_var_shader_out || mode == nir_var_shared);
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nir_intrinsic_instr *store =
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nir_intrinsic_instr_create(state->mem_ctx,
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store_op(state, mode, per_vertex));
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store->num_components = intrin->num_components;
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nir_src_copy(&store->src[0], &intrin->src[0], store);
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nir_intrinsic_set_base(store,
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var->data.driver_location);
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if (mode == nir_var_shader_out) {
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nir_intrinsic_set_component(store, var->data.location_frac);
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}
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nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(intrin));
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if (per_vertex)
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store->src[1] = nir_src_for_ssa(vertex_index);
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store->src[per_vertex ? 2 : 1] = nir_src_for_ssa(offset);
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replacement = store;
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case nir_intrinsic_store_var:
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replacement = lower_store(intrin, state, vertex_index, offset);
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break;
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}
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case nir_intrinsic_var_atomic_add:
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case nir_intrinsic_var_atomic_imin:
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@ -351,26 +363,10 @@ nir_lower_io_block(nir_block *block,
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case nir_intrinsic_var_atomic_or:
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case nir_intrinsic_var_atomic_xor:
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case nir_intrinsic_var_atomic_exchange:
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case nir_intrinsic_var_atomic_comp_swap: {
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assert(mode == nir_var_shared);
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nir_intrinsic_instr *atomic =
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nir_intrinsic_instr_create(state->mem_ctx,
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atomic_op(intrin->intrinsic));
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atomic->src[0] = nir_src_for_ssa(offset);
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atomic->const_index[0] = var->data.driver_location;
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for (unsigned i = 0;
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i < nir_op_infos[intrin->intrinsic].num_inputs;
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i++) {
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nir_src_copy(&atomic->src[i+1], &intrin->src[i], atomic);
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}
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replacement = atomic;
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case nir_intrinsic_var_atomic_comp_swap:
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assert(vertex_index == NULL);
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replacement = lower_atomic(intrin, state, offset);
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break;
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}
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default:
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break;
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