i965: Add helper function for allowed config formats
The driver checks dri config options and loader caps to filter out certain formats during config creation. Fold 4 call sites under a single helper function. Signed-off-by: Kevin Strasser <kevin.strasser@intel.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
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@ -2148,6 +2148,36 @@ intel_loader_get_cap(const __DRIscreen *dri_screen, enum dri_loader_cap cap)
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return 0;
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return 0;
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}
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}
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static bool
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intel_allowed_format(__DRIscreen *dri_screen, mesa_format format)
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{
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struct intel_screen *screen = dri_screen->driverPrivate;
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/* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */
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bool allow_rgba_ordering = intel_loader_get_cap(dri_screen, DRI_LOADER_CAP_RGBA_ORDERING);
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if (!allow_rgba_ordering &&
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(format == MESA_FORMAT_R8G8B8A8_UNORM ||
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format == MESA_FORMAT_R8G8B8X8_UNORM ||
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format == MESA_FORMAT_R8G8B8A8_SRGB))
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return false;
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/* Shall we expose 10 bpc formats? */
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bool allow_rgb10_configs = driQueryOptionb(&screen->optionCache,
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"allow_rgb10_configs");
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if (!allow_rgb10_configs &&
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(format == MESA_FORMAT_B10G10R10A2_UNORM ||
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format == MESA_FORMAT_B10G10R10X2_UNORM))
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return false;
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/* Shall we expose 565 formats? */
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bool allow_rgb565_configs = driQueryOptionb(&screen->optionCache,
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"allow_rgb565_configs");
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if (!allow_rgb565_configs && format == MESA_FORMAT_B5G6R5_UNORM)
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return false;
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return true;
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}
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static __DRIconfig**
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static __DRIconfig**
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intel_screen_make_configs(__DRIscreen *dri_screen)
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intel_screen_make_configs(__DRIscreen *dri_screen)
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{
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{
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@ -2198,19 +2228,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
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uint8_t depth_bits[4], stencil_bits[4];
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uint8_t depth_bits[4], stencil_bits[4];
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__DRIconfig **configs = NULL;
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__DRIconfig **configs = NULL;
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/* Expose only BGRA ordering if the loader doesn't support RGBA ordering. */
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unsigned num_formats = ARRAY_SIZE(formats);
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unsigned num_formats;
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if (intel_loader_get_cap(dri_screen, DRI_LOADER_CAP_RGBA_ORDERING))
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num_formats = ARRAY_SIZE(formats);
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else
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num_formats = ARRAY_SIZE(formats) - 3; /* all - RGBA_ORDERING formats */
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/* Shall we expose 10 bpc formats? */
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bool allow_rgb10_configs = driQueryOptionb(&screen->optionCache,
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"allow_rgb10_configs");
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/* Shall we expose 565 formats? */
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bool allow_rgb565_configs = driQueryOptionb(&screen->optionCache,
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"allow_rgb565_configs");
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/* Generate singlesample configs, each without accumulation buffer
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/* Generate singlesample configs, each without accumulation buffer
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* and with EGL_MUTABLE_RENDER_BUFFER_BIT_KHR.
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* and with EGL_MUTABLE_RENDER_BUFFER_BIT_KHR.
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@ -2219,12 +2237,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
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__DRIconfig **new_configs;
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__DRIconfig **new_configs;
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int num_depth_stencil_bits = 2;
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int num_depth_stencil_bits = 2;
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if (!allow_rgb10_configs &&
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if (!intel_allowed_format(dri_screen, formats[i]))
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(formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
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formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
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continue;
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if (!allow_rgb565_configs && formats[i] == MESA_FORMAT_B5G6R5_UNORM)
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continue;
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continue;
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/* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
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/* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
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@ -2264,12 +2277,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
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for (unsigned i = 0; i < num_formats; i++) {
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for (unsigned i = 0; i < num_formats; i++) {
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__DRIconfig **new_configs;
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__DRIconfig **new_configs;
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if (!allow_rgb10_configs &&
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if (!intel_allowed_format(dri_screen, formats[i]))
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(formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
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formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
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continue;
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if (!allow_rgb565_configs && formats[i] == MESA_FORMAT_B5G6R5_UNORM)
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continue;
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continue;
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if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
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if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) {
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@ -2305,12 +2313,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen)
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if (devinfo->gen < 6)
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if (devinfo->gen < 6)
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break;
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break;
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if (!allow_rgb10_configs &&
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if (!intel_allowed_format(dri_screen, formats[i]))
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(formats[i] == MESA_FORMAT_B10G10R10A2_UNORM ||
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formats[i] == MESA_FORMAT_B10G10R10X2_UNORM))
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continue;
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if (!allow_rgb565_configs && formats[i] == MESA_FORMAT_B5G6R5_UNORM)
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continue;
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continue;
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__DRIconfig **new_configs;
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__DRIconfig **new_configs;
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