radv/ac: handle emitting vertex outputs to esgs ring.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Dave Airlie <airlied@redhat.com>
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ac642c6195
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4ec294adce
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@ -4557,6 +4557,39 @@ handle_vs_outputs_post(struct nir_to_llvm_context *ctx)
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ctx->shader_info->vs.param_exports = param_count;
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}
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static void
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handle_es_outputs_post(struct nir_to_llvm_context *ctx)
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{
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int j;
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uint64_t max_output_written = 0;
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for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
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LLVMValueRef *out_ptr = &ctx->outputs[i * 4];
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int param_index;
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if (!(ctx->output_mask & (1ull << i)))
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continue;
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param_index = shader_io_get_unique_index(i);
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if (param_index > max_output_written)
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max_output_written = param_index;
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for (j = 0; j < 4; j++) {
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LLVMValueRef out_val = LLVMBuildLoad(ctx->builder, out_ptr[j], "");
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out_val = LLVMBuildBitCast(ctx->builder, out_val, ctx->i32, "");
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build_tbuffer_store(ctx,
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ctx->esgs_ring,
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out_val, 1,
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LLVMGetUndef(ctx->i32), ctx->es2gs_offset,
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(4 * param_index + j) * 4,
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V_008F0C_BUF_DATA_FORMAT_32,
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V_008F0C_BUF_NUM_FORMAT_UINT,
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0, 0, 1, 1, 0);
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}
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}
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ctx->shader_info->vs.esgs_itemsize = (max_output_written + 1) * 16;
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}
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static void
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si_export_mrt_color(struct nir_to_llvm_context *ctx,
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LLVMValueRef *color, unsigned param, bool is_last)
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@ -4678,7 +4711,10 @@ handle_shader_outputs_post(struct nir_to_llvm_context *ctx)
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{
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switch (ctx->stage) {
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case MESA_SHADER_VERTEX:
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handle_vs_outputs_post(ctx);
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if (ctx->options->key.vs.as_es)
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handle_es_outputs_post(ctx);
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else
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handle_vs_outputs_post(ctx);
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break;
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case MESA_SHADER_FRAGMENT:
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handle_fs_outputs_post(ctx);
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@ -105,6 +105,7 @@ struct ac_shader_variant_info {
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bool as_es;
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uint8_t clip_dist_mask;
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uint8_t cull_dist_mask;
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uint32_t esgs_itemsize;
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} vs;
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struct {
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unsigned num_interp;
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