radv: Add force_emulate_rt perftest option
Signed-off-by: Joshua Ashton <joshua@froggi.es> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12974>
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@ -702,6 +702,9 @@ RADV driver environment variables
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enable wave32 for compute shaders (GFX10+)
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``dccmsaa``
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enable DCC for MSAA images
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``force_emulate_rt``
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forces ray-tracing to be emulated in software,
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even if there is hardware support.
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``gewave32``
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enable wave32 for vertex/tess/geometry shaders (GFX10+)
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``localbos``
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@ -76,6 +76,7 @@ enum {
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RADV_PERFTEST_SAM = 1u << 7,
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RADV_PERFTEST_RT = 1u << 8,
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RADV_PERFTEST_NGGC = 1u << 9,
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RADV_PERFTEST_FORCE_EMULATE_RT = 1u << 10,
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};
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bool radv_init_trace(struct radv_device *device);
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@ -861,6 +861,7 @@ static const struct debug_control radv_perftest_options[] = {{"localbos", RADV_P
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{"sam", RADV_PERFTEST_SAM},
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{"rt", RADV_PERFTEST_RT},
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{"nggc", RADV_PERFTEST_NGGC},
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{"force_emulate_rt", RADV_PERFTEST_FORCE_EMULATE_RT},
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{NULL, 0}};
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const char *
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@ -219,6 +219,8 @@ radv_get_hash_flags(const struct radv_device *device, bool stats)
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if (device->instance->perftest_flags & RADV_PERFTEST_NGGC)
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hash_flags |= RADV_HASH_SHADER_FORCE_NGG_CULLING;
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if (device->instance->perftest_flags & RADV_PERFTEST_FORCE_EMULATE_RT)
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hash_flags |= RADV_HASH_SHADER_FORCE_EMULATE_RT;
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if (device->physical_device->cs_wave_size == 32)
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hash_flags |= RADV_HASH_SHADER_CS_WAVE32;
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if (device->physical_device->ps_wave_size == 32)
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@ -1877,7 +1877,8 @@ insert_traversal(struct radv_device *device, const VkRayTracingPipelineCreateInf
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bvh_node = nir_iadd(b, nir_load_var(b, trav_vars.bvh_base), nir_u2u(b, bvh_node, 64));
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nir_ssa_def *intrinsic_result = NULL;
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if (device->physical_device->rad_info.chip_class >= GFX10_3) {
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if (device->physical_device->rad_info.chip_class >= GFX10_3
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&& !(device->instance->perftest_flags & RADV_PERFTEST_FORCE_EMULATE_RT)) {
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intrinsic_result = nir_bvh64_intersect_ray_amd(
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b, 32, desc, nir_unpack_64_2x32(b, bvh_node), nir_load_var(b, vars->tmax),
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nir_load_var(b, trav_vars.origin), nir_load_var(b, trav_vars.dir),
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@ -1662,6 +1662,7 @@ struct radv_event {
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#define RADV_HASH_SHADER_FORCE_NGG_CULLING (1 << 13)
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#define RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS (1 << 14)
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#define RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS2 (1 << 15)
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#define RADV_HASH_SHADER_FORCE_EMULATE_RT (1 << 16)
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struct radv_pipeline_key;
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