nir: Add AMD-specific Geometry Shader related intrinsics.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
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@ -141,6 +141,8 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
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case nir_intrinsic_load_ring_tess_offchip_amd:
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case nir_intrinsic_load_ring_tess_factors_offset_amd:
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case nir_intrinsic_load_ring_tess_offchip_offset_amd:
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case nir_intrinsic_load_ring_esgs_amd:
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case nir_intrinsic_load_ring_es2gs_offset_amd:
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is_divergent = false;
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break;
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@ -479,6 +481,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
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case nir_intrinsic_elect:
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case nir_intrinsic_load_tlb_color_v3d:
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case nir_intrinsic_load_tess_rel_patch_id_amd:
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case nir_intrinsic_load_gs_vertex_offset_amd:
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is_divergent = true;
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break;
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@ -1147,11 +1147,16 @@ system_value("ring_tess_offchip_offset_amd", 1)
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# Descriptor where TCS outputs are stored for the HW tessellator
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system_value("ring_tess_factors_amd", 4)
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system_value("ring_tess_factors_offset_amd", 1)
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# Descriptor where ES outputs are stored for GS to read on GFX6-8
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system_value("ring_esgs_amd", 4)
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system_value("ring_es2gs_offset_amd", 1)
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# Number of patches processed by each TCS workgroup
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system_value("tcs_num_patches_amd", 1)
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# Relative tessellation patch ID within the current workgroup
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system_value("tess_rel_patch_id_amd", 1)
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# Vertex offsets used for GS per-vertex inputs
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system_value("gs_vertex_offset_amd", 1, [BASE])
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# V3D-specific instrinc for tile buffer color reads.
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#
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