i965/blorp: Add support for disabling color blending
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -170,6 +170,10 @@ brw_blorp_params::brw_blorp_params(unsigned num_varyings,
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num_draw_buffers(num_draw_buffers),
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num_layers(num_layers)
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{
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color_write_disable[0] = false;
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color_write_disable[1] = false;
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color_write_disable[2] = false;
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color_write_disable[3] = false;
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}
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extern "C" {
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@ -242,6 +242,7 @@ public:
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brw_blorp_surface_info dst;
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enum gen6_hiz_op hiz_op;
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unsigned fast_clear_op;
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bool color_write_disable[4];
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bool use_wm_prog;
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brw_blorp_wm_push_constants wm_push_consts;
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const unsigned num_varyings;
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@ -260,6 +260,11 @@ gen6_blorp_emit_blend_state(struct brw_context *brw,
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blend[i].blend1.pre_blend_clamp_enable = 1;
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blend[i].blend1.post_blend_clamp_enable = 1;
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blend[i].blend1.clamp_range = BRW_RENDERTARGET_CLAMPRANGE_FORMAT;
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blend[i].blend1.write_disable_r = params->color_write_disable[0];
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blend[i].blend1.write_disable_g = params->color_write_disable[1];
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blend[i].blend1.write_disable_b = params->color_write_disable[2];
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blend[i].blend1.write_disable_a = params->color_write_disable[3];
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}
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return cc_blend_state_offset;
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@ -138,6 +138,15 @@ gen8_blorp_emit_blend_state(struct brw_context *brw,
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memset(blend, 0, size);
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for (unsigned i = 0; i < params->num_draw_buffers; ++i) {
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if (params->color_write_disable[0])
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blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_RED;
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if (params->color_write_disable[1])
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blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_GREEN;
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if (params->color_write_disable[2])
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blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_BLUE;
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if (params->color_write_disable[3])
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blend[1 + 2 * i] |= GEN8_BLEND_WRITE_DISABLE_ALPHA;
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blend[1 + 2 * i + 1] = GEN8_BLEND_PRE_BLEND_COLOR_CLAMP_ENABLE |
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GEN8_BLEND_POST_BLEND_COLOR_CLAMP_ENABLE |
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GEN8_BLEND_COLOR_CLAMP_RANGE_RTFORMAT;
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