radeonsi: extract DB->CB copy logic into its own function
Also clean up some of the looping. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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18cc825fb9
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@ -101,6 +101,69 @@ static unsigned u_max_sample(struct pipe_resource *r)
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return r->nr_samples ? r->nr_samples - 1 : 0;
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}
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static void
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si_blit_dbcb_copy(struct si_context *sctx,
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struct r600_texture *src,
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struct r600_texture *dst,
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unsigned planes, unsigned level_mask,
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unsigned first_layer, unsigned last_layer,
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unsigned first_sample, unsigned last_sample)
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{
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struct pipe_surface surf_tmpl = {{0}};
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unsigned layer, sample, checked_last_layer, max_layer;
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if (planes & PIPE_MASK_Z)
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sctx->dbcb_depth_copy_enabled = true;
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if (planes & PIPE_MASK_S)
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sctx->dbcb_stencil_copy_enabled = true;
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si_mark_atom_dirty(sctx, &sctx->db_render_state);
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assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
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while (level_mask) {
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unsigned level = u_bit_scan(&level_mask);
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/* The smaller the mipmap level, the less layers there are
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* as far as 3D textures are concerned. */
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max_layer = util_max_layer(&src->resource.b.b, level);
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checked_last_layer = MIN2(last_layer, max_layer);
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surf_tmpl.u.tex.level = level;
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for (layer = first_layer; layer <= checked_last_layer; layer++) {
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struct pipe_surface *zsurf, *cbsurf;
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surf_tmpl.format = src->resource.b.b.format;
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surf_tmpl.u.tex.first_layer = layer;
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surf_tmpl.u.tex.last_layer = layer;
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zsurf = sctx->b.b.create_surface(&sctx->b.b, &src->resource.b.b, &surf_tmpl);
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surf_tmpl.format = dst->resource.b.b.format;
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cbsurf = sctx->b.b.create_surface(&sctx->b.b, &dst->resource.b.b, &surf_tmpl);
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for (sample = first_sample; sample <= last_sample; sample++) {
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if (sample != sctx->dbcb_copy_sample) {
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sctx->dbcb_copy_sample = sample;
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si_mark_atom_dirty(sctx, &sctx->db_render_state);
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}
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si_blitter_begin(&sctx->b.b, SI_DECOMPRESS);
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util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
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sctx->custom_dsa_flush, 1.0f);
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si_blitter_end(&sctx->b.b);
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}
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pipe_surface_reference(&zsurf, NULL);
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pipe_surface_reference(&cbsurf, NULL);
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}
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}
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sctx->dbcb_depth_copy_enabled = false;
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sctx->dbcb_stencil_copy_enabled = false;
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si_mark_atom_dirty(sctx, &sctx->db_render_state);
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}
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static void si_blit_decompress_depth(struct pipe_context *ctx,
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struct r600_texture *texture,
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struct r600_texture *staging,
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@ -108,60 +171,22 @@ static void si_blit_decompress_depth(struct pipe_context *ctx,
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unsigned first_layer, unsigned last_layer,
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unsigned first_sample, unsigned last_sample)
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{
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struct si_context *sctx = (struct si_context *)ctx;
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unsigned layer, level, sample, checked_last_layer, max_layer;
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float depth = 1.0f;
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const struct util_format_description *desc;
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unsigned planes = 0;
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assert(staging != NULL && "use si_blit_decompress_zs_in_place instead");
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desc = util_format_description(staging->resource.b.b.format);
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if (util_format_has_depth(desc))
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sctx->dbcb_depth_copy_enabled = true;
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planes |= PIPE_MASK_Z;
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if (util_format_has_stencil(desc))
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sctx->dbcb_stencil_copy_enabled = true;
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planes |= PIPE_MASK_S;
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assert(sctx->dbcb_depth_copy_enabled || sctx->dbcb_stencil_copy_enabled);
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for (level = first_level; level <= last_level; level++) {
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/* The smaller the mipmap level, the less layers there are
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* as far as 3D textures are concerned. */
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max_layer = util_max_layer(&texture->resource.b.b, level);
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checked_last_layer = MIN2(last_layer, max_layer);
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for (layer = first_layer; layer <= checked_last_layer; layer++) {
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for (sample = first_sample; sample <= last_sample; sample++) {
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struct pipe_surface *zsurf, *cbsurf, surf_tmpl;
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sctx->dbcb_copy_sample = sample;
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si_mark_atom_dirty(sctx, &sctx->db_render_state);
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surf_tmpl.format = texture->resource.b.b.format;
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surf_tmpl.u.tex.level = level;
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surf_tmpl.u.tex.first_layer = layer;
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surf_tmpl.u.tex.last_layer = layer;
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zsurf = ctx->create_surface(ctx, &texture->resource.b.b, &surf_tmpl);
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surf_tmpl.format = staging->resource.b.b.format;
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cbsurf = ctx->create_surface(ctx,
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(struct pipe_resource*)staging, &surf_tmpl);
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si_blitter_begin(ctx, SI_DECOMPRESS);
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util_blitter_custom_depth_stencil(sctx->blitter, zsurf, cbsurf, 1 << sample,
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sctx->custom_dsa_flush, depth);
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si_blitter_end(ctx);
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pipe_surface_reference(&zsurf, NULL);
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pipe_surface_reference(&cbsurf, NULL);
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}
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}
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}
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sctx->dbcb_depth_copy_enabled = false;
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sctx->dbcb_stencil_copy_enabled = false;
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si_mark_atom_dirty(sctx, &sctx->db_render_state);
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si_blit_dbcb_copy(
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(struct si_context *)ctx, texture, staging, planes,
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u_bit_consecutive(first_level, last_level - first_level + 1),
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first_layer, last_layer, first_sample, last_sample);
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}
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/* Helper function for si_blit_decompress_zs_in_place.
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