From 49e6c2fb78c33b90882911894ce6e29cdc60baf6 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Mon, 22 Jul 2019 02:31:27 +0200 Subject: [PATCH] radv: Store color/depth surface info in attachment info instead of framebuffer. That way we can use it for imageless framebuffers. Reviewed-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 50 ++++++------- src/amd/vulkan/radv_device.c | 13 +--- src/amd/vulkan/radv_meta_clear.c | 8 +- src/amd/vulkan/radv_meta_resolve.c | 16 ++-- src/amd/vulkan/radv_meta_resolve_cs.c | 8 +- src/amd/vulkan/radv_meta_resolve_fs.c | 8 +- src/amd/vulkan/radv_private.h | 103 ++++++++++++++------------ 7 files changed, 102 insertions(+), 104 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index b5c1476ed22..cd31cead287 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -990,7 +990,6 @@ radv_emit_rbplus_state(struct radv_cmd_buffer *cmd_buffer) return; struct radv_pipeline *pipeline = cmd_buffer->state.pipeline; - struct radv_framebuffer *framebuffer = cmd_buffer->state.framebuffer; const struct radv_subpass *subpass = cmd_buffer->state.subpass; unsigned sx_ps_downconvert = 0; @@ -1005,7 +1004,7 @@ radv_emit_rbplus_state(struct radv_cmd_buffer *cmd_buffer) } int idx = subpass->color_attachments[i].attachment; - struct radv_color_buffer_info *cb = &framebuffer->attachments[idx].cb; + struct radv_color_buffer_info *cb = &cmd_buffer->state.attachments[idx].cb; unsigned format = G_028C70_FORMAT(cb->cb_color_info); unsigned swap = G_028C70_COMP_SWAP(cb->cb_color_info); @@ -1284,12 +1283,11 @@ radv_emit_depth_bias(struct radv_cmd_buffer *cmd_buffer) static void radv_emit_fb_color_state(struct radv_cmd_buffer *cmd_buffer, int index, - struct radv_attachment_info *att, + struct radv_color_buffer_info *cb, struct radv_image_view *iview, VkImageLayout layout) { bool is_vi = cmd_buffer->device->physical_device->rad_info.chip_class >= GFX8; - struct radv_color_buffer_info *cb = &att->cb; uint32_t cb_color_info = cb->cb_color_info; struct radv_image *image = iview->image; @@ -1533,7 +1531,6 @@ radv_update_bound_fast_clear_ds(struct radv_cmd_buffer *cmd_buffer, struct radv_framebuffer *framebuffer = cmd_buffer->state.framebuffer; const struct radv_subpass *subpass = cmd_buffer->state.subpass; struct radeon_cmdbuf *cs = cmd_buffer->cs; - struct radv_attachment_info *att; uint32_t att_idx; if (!framebuffer || !subpass) @@ -1543,8 +1540,7 @@ radv_update_bound_fast_clear_ds(struct radv_cmd_buffer *cmd_buffer, return; att_idx = subpass->depth_stencil_attachment->attachment; - att = &framebuffer->attachments[att_idx]; - if (att->attachment->image != image) + if (framebuffer->attachments[att_idx]->image != image) return; radeon_set_context_reg_seq(cs, R_028028_DB_STENCIL_CLEAR, 2); @@ -1558,7 +1554,7 @@ radv_update_bound_fast_clear_ds(struct radv_cmd_buffer *cmd_buffer, ds_clear_value.depth == 0.0) { VkImageLayout layout = subpass->depth_stencil_attachment->layout; - radv_update_zrange_precision(cmd_buffer, &att->ds, image, + radv_update_zrange_precision(cmd_buffer, &cmd_buffer->state.attachments[att_idx].ds, image, layout, false); } @@ -1783,7 +1779,6 @@ radv_update_bound_fast_clear_color(struct radv_cmd_buffer *cmd_buffer, struct radv_framebuffer *framebuffer = cmd_buffer->state.framebuffer; const struct radv_subpass *subpass = cmd_buffer->state.subpass; struct radeon_cmdbuf *cs = cmd_buffer->cs; - struct radv_attachment_info *att; uint32_t att_idx; if (!framebuffer || !subpass) @@ -1793,8 +1788,7 @@ radv_update_bound_fast_clear_color(struct radv_cmd_buffer *cmd_buffer, if (att_idx == VK_ATTACHMENT_UNUSED) return; - att = &framebuffer->attachments[att_idx]; - if (att->attachment->image != image) + if (framebuffer->attachments[att_idx]->image != image) return; radeon_set_context_reg_seq(cs, R_028C8C_CB_COLOR0_CLEAR_WORD0 + cb_idx * 0x3c, 2); @@ -1919,15 +1913,14 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer) } int idx = subpass->color_attachments[i].attachment; - struct radv_attachment_info *att = &framebuffer->attachments[idx]; - struct radv_image_view *iview = att->attachment; + struct radv_image_view *iview = framebuffer->attachments[idx]; VkImageLayout layout = subpass->color_attachments[i].layout; - radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, att->attachment->bo); + radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, iview->bo); - assert(att->attachment->aspect_mask & (VK_IMAGE_ASPECT_COLOR_BIT | VK_IMAGE_ASPECT_PLANE_0_BIT | + assert(iview->aspect_mask & (VK_IMAGE_ASPECT_COLOR_BIT | VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT | VK_IMAGE_ASPECT_PLANE_2_BIT)); - radv_emit_fb_color_state(cmd_buffer, i, att, iview, layout); + radv_emit_fb_color_state(cmd_buffer, i, &cmd_buffer->state.attachments[idx].cb, iview, layout); radv_load_color_clear_metadata(cmd_buffer, iview, i); } @@ -1935,9 +1928,8 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer) if (subpass->depth_stencil_attachment) { int idx = subpass->depth_stencil_attachment->attachment; VkImageLayout layout = subpass->depth_stencil_attachment->layout; - struct radv_attachment_info *att = &framebuffer->attachments[idx]; - struct radv_image *image = att->attachment->image; - radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, att->attachment->bo); + struct radv_image *image = framebuffer->attachments[idx]->image; + radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, framebuffer->attachments[idx]->bo); ASSERTED uint32_t queue_mask = radv_image_queue_family_mask(image, cmd_buffer->queue_family_index, cmd_buffer->queue_family_index); @@ -1945,11 +1937,11 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer) assert(radv_layout_has_htile(image, layout, queue_mask) == radv_layout_is_htile_compressed(image, layout, queue_mask)); - radv_emit_fb_ds_state(cmd_buffer, &att->ds, image, layout); + radv_emit_fb_ds_state(cmd_buffer, &cmd_buffer->state.attachments[idx].ds, image, layout); - if (att->ds.offset_scale != cmd_buffer->state.offset_scale) { + if (cmd_buffer->state.attachments[idx].ds.offset_scale != cmd_buffer->state.offset_scale) { cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS; - cmd_buffer->state.offset_scale = att->ds.offset_scale; + cmd_buffer->state.offset_scale = cmd_buffer->state.attachments[idx].ds.offset_scale; } radv_load_ds_clear_metadata(cmd_buffer, image); } else { @@ -2847,7 +2839,7 @@ radv_get_attachment_sample_locations(struct radv_cmd_buffer *cmd_buffer, { struct radv_cmd_state *state = &cmd_buffer->state; uint32_t subpass_id = radv_get_subpass_id(cmd_buffer); - struct radv_image_view *view = state->framebuffer->attachments[att_idx].attachment; + struct radv_image_view *view = state->framebuffer->attachments[att_idx]; if (view->image->info.samples == 1) return NULL; @@ -2886,7 +2878,7 @@ static void radv_handle_subpass_image_transition(struct radv_cmd_buffer *cmd_buf bool begin_subpass) { unsigned idx = att.attachment; - struct radv_image_view *view = cmd_buffer->state.framebuffer->attachments[idx].attachment; + struct radv_image_view *view = cmd_buffer->state.framebuffer->attachments[idx]; struct radv_sample_locations_state *sample_locs; VkImageSubresourceRange range; range.aspectMask = 0; @@ -2951,8 +2943,7 @@ radv_cmd_state_setup_sample_locations(struct radv_cmd_buffer *cmd_buffer, const VkAttachmentSampleLocationsEXT *att_sample_locs = &sample_locs->pAttachmentInitialSampleLocations[i]; uint32_t att_idx = att_sample_locs->attachmentIndex; - struct radv_attachment_info *att = &framebuffer->attachments[att_idx]; - struct radv_image *image = att->attachment->image; + struct radv_image *image = framebuffer->attachments[att_idx]->image; assert(vk_format_is_depth_or_stencil(image->vk_format)); @@ -3069,6 +3060,13 @@ radv_cmd_state_setup_attachments(struct radv_cmd_buffer *cmd_buffer, state->attachments[i].current_layout = att->initial_layout; state->attachments[i].sample_location.count = 0; + + struct radv_image_view *iview = state->framebuffer->attachments[i]; + if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) { + radv_initialise_ds_surface(cmd_buffer->device, &state->attachments[i].ds, iview); + } else { + radv_initialise_color_surface(cmd_buffer->device, &state->attachments[i].cb, iview); + } } return VK_SUCCESS; diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 07b4aeb0649..0d4b25c6969 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -4352,7 +4352,7 @@ radv_init_dcc_control_reg(struct radv_device *device, S_028C78_INDEPENDENT_128B_BLOCKS(independent_128b_blocks); } -static void +void radv_initialise_color_surface(struct radv_device *device, struct radv_color_buffer_info *cb, struct radv_image_view *iview) @@ -4612,7 +4612,7 @@ radv_calc_decompress_on_z_planes(struct radv_device *device, return max_zplanes; } -static void +void radv_initialise_ds_surface(struct radv_device *device, struct radv_ds_buffer_info *ds, struct radv_image_view *iview) @@ -4810,7 +4810,7 @@ VkResult radv_CreateFramebuffer( assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO); size_t size = sizeof(*framebuffer) + - sizeof(struct radv_attachment_info) * pCreateInfo->attachmentCount; + sizeof(struct radv_image_view*) * pCreateInfo->attachmentCount; framebuffer = vk_alloc2(&device->alloc, pAllocator, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); if (framebuffer == NULL) @@ -4823,12 +4823,7 @@ VkResult radv_CreateFramebuffer( for (uint32_t i = 0; i < pCreateInfo->attachmentCount; i++) { VkImageView _iview = pCreateInfo->pAttachments[i]; struct radv_image_view *iview = radv_image_view_from_handle(_iview); - framebuffer->attachments[i].attachment = iview; - if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) { - radv_initialise_ds_surface(device, &framebuffer->attachments[i].ds, iview); - } else { - radv_initialise_color_surface(device, &framebuffer->attachments[i].cb, iview); - } + framebuffer->attachments[i] = iview; framebuffer->width = MIN2(framebuffer->width, iview->extent.width); framebuffer->height = MIN2(framebuffer->height, iview->extent.height); framebuffer->layers = MIN2(framebuffer->layers, radv_surface_max_layer_count(iview)); diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index d9615a280b0..c2660679b58 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -370,7 +370,7 @@ emit_color_clear(struct radv_cmd_buffer *cmd_buffer, const struct radv_framebuffer *fb = cmd_buffer->state.framebuffer; const uint32_t subpass_att = clear_att->colorAttachment; const uint32_t pass_att = subpass->color_attachments[subpass_att].attachment; - const struct radv_image_view *iview = fb ? fb->attachments[pass_att].attachment : NULL; + const struct radv_image_view *iview = fb ? fb->attachments[pass_att] : NULL; uint32_t samples, samples_log2; VkFormat format; unsigned fs_key; @@ -725,7 +725,7 @@ emit_depthstencil_clear(struct radv_cmd_buffer *cmd_buffer, const uint32_t pass_att = ds_att->attachment; VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil; VkImageAspectFlags aspects = clear_att->aspectMask; - const struct radv_image_view *iview = fb ? fb->attachments[pass_att].attachment : NULL; + const struct radv_image_view *iview = fb ? fb->attachments[pass_att] : NULL; uint32_t samples, samples_log2; VkCommandBuffer cmd_buffer_h = radv_cmd_buffer_to_handle(cmd_buffer); @@ -1679,7 +1679,7 @@ emit_clear(struct radv_cmd_buffer *cmd_buffer, return; VkImageLayout image_layout = subpass->color_attachments[subpass_att].layout; - const struct radv_image_view *iview = fb ? fb->attachments[pass_att].attachment : NULL; + const struct radv_image_view *iview = fb ? fb->attachments[pass_att] : NULL; VkClearColorValue clear_value = clear_att->clearValue.color; if (radv_can_fast_clear_color(cmd_buffer, iview, image_layout, @@ -1700,7 +1700,7 @@ emit_clear(struct radv_cmd_buffer *cmd_buffer, return; VkImageLayout image_layout = ds_att->layout; - const struct radv_image_view *iview = fb ? fb->attachments[ds_att->attachment].attachment : NULL; + const struct radv_image_view *iview = fb ? fb->attachments[ds_att->attachment] : NULL; VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil; assert(aspects & (VK_IMAGE_ASPECT_DEPTH_BIT | diff --git a/src/amd/vulkan/radv_meta_resolve.c b/src/amd/vulkan/radv_meta_resolve.c index 6517634df25..6cad62d440c 100644 --- a/src/amd/vulkan/radv_meta_resolve.c +++ b/src/amd/vulkan/radv_meta_resolve.c @@ -641,9 +641,9 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer) struct radv_subpass_attachment src_att = *subpass->depth_stencil_attachment; struct radv_subpass_attachment dst_att = *subpass->ds_resolve_attachment; struct radv_image_view *src_iview = - cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment; + cmd_buffer->state.framebuffer->attachments[src_att.attachment]; struct radv_image_view *dst_iview = - cmd_buffer->state.framebuffer->attachments[dst_att.attachment].attachment; + cmd_buffer->state.framebuffer->attachments[dst_att.attachment]; radv_pick_resolve_method_images(src_iview->image, src_iview->vk_format, @@ -694,8 +694,8 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer) /* Make sure to not clear color attachments after resolves. */ cmd_buffer->state.attachments[dest_att.attachment].pending_clear_aspects = 0; - struct radv_image *dst_img = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image; - struct radv_image_view *src_iview= cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment; + struct radv_image *dst_img = cmd_buffer->state.framebuffer->attachments[dest_att.attachment]->image; + struct radv_image_view *src_iview= cmd_buffer->state.framebuffer->attachments[src_att.attachment]; struct radv_image *src_img = src_iview->image; radv_pick_resolve_method_images(src_img, src_iview->vk_format, @@ -725,7 +725,7 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer *cmd_buffer) if (dest_att.attachment == VK_ATTACHMENT_UNUSED) continue; - struct radv_image_view *dest_iview = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment; + struct radv_image_view *dest_iview = cmd_buffer->state.framebuffer->attachments[dest_att.attachment]; struct radv_image *dst_img = dest_iview->image; if (radv_dcc_enabled(dst_img, dest_iview->base_mip)) { @@ -787,8 +787,7 @@ radv_decompress_resolve_subpass_src(struct radv_cmd_buffer *cmd_buffer) if (dest_att.attachment == VK_ATTACHMENT_UNUSED) continue; - struct radv_image_view *src_iview = - fb->attachments[src_att.attachment].attachment; + struct radv_image_view *src_iview = fb->attachments[src_att.attachment]; struct radv_image *src_image = src_iview->image; VkImageResolve region = {}; @@ -803,8 +802,7 @@ radv_decompress_resolve_subpass_src(struct radv_cmd_buffer *cmd_buffer) if (subpass->ds_resolve_attachment) { struct radv_subpass_attachment src_att = *subpass->depth_stencil_attachment; - struct radv_image_view *src_iview = - fb->attachments[src_att.attachment].attachment; + struct radv_image_view *src_iview = fb->attachments[src_att.attachment]; struct radv_image *src_image = src_iview->image; VkImageResolve region = {}; diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index 13c61509b21..b5d6ae12d0f 100644 --- a/src/amd/vulkan/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/radv_meta_resolve_cs.c @@ -921,8 +921,8 @@ radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer) if (dst_att.attachment == VK_ATTACHMENT_UNUSED) continue; - struct radv_image_view *src_iview = fb->attachments[src_att.attachment].attachment; - struct radv_image_view *dst_iview = fb->attachments[dst_att.attachment].attachment; + struct radv_image_view *src_iview = fb->attachments[src_att.attachment]; + struct radv_image_view *dst_iview = fb->attachments[dst_att.attachment]; VkImageResolve region = { .extent = (VkExtent3D){ fb->width, fb->height, 0 }, @@ -989,9 +989,9 @@ radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer, struct radv_subpass_attachment dest_att = *subpass->ds_resolve_attachment; struct radv_image_view *src_iview = - cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment; + cmd_buffer->state.framebuffer->attachments[src_att.attachment]; struct radv_image_view *dst_iview = - cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment; + cmd_buffer->state.framebuffer->attachments[dest_att.attachment]; struct radv_image *src_image = src_iview->image; struct radv_image *dst_image = dst_iview->image; diff --git a/src/amd/vulkan/radv_meta_resolve_fs.c b/src/amd/vulkan/radv_meta_resolve_fs.c index e6edc159372..89d074c18a9 100644 --- a/src/amd/vulkan/radv_meta_resolve_fs.c +++ b/src/amd/vulkan/radv_meta_resolve_fs.c @@ -1146,8 +1146,8 @@ radv_cmd_buffer_resolve_subpass_fs(struct radv_cmd_buffer *cmd_buffer) if (dest_att.attachment == VK_ATTACHMENT_UNUSED) continue; - struct radv_image_view *dest_iview = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment; - struct radv_image_view *src_iview = cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment; + struct radv_image_view *dest_iview = cmd_buffer->state.framebuffer->attachments[dest_att.attachment]; + struct radv_image_view *src_iview = cmd_buffer->state.framebuffer->attachments[src_att.attachment]; struct radv_subpass resolve_subpass = { .color_count = 1, @@ -1201,10 +1201,10 @@ radv_depth_stencil_resolve_subpass_fs(struct radv_cmd_buffer *cmd_buffer, struct radv_subpass_attachment dst_att = *subpass->ds_resolve_attachment; struct radv_image_view *src_iview = - cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment; + cmd_buffer->state.framebuffer->attachments[src_att.attachment]; struct radv_image *src_image = src_iview->image; struct radv_image_view *dst_iview = - cmd_buffer->state.framebuffer->attachments[dst_att.attachment].attachment; + cmd_buffer->state.framebuffer->attachments[dst_att.attachment]; struct radv_subpass resolve_subpass = { .color_count = 0, diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index a329f13586f..a6af3351114 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -206,6 +206,7 @@ radv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask) * propagating errors. Might be useful to plug in a stack trace here. */ +struct radv_image_view; struct radv_instance; VkResult __vk_errorf(struct radv_instance *instance, VkResult error, const char *file, int line, const char *format, ...); @@ -1039,6 +1040,54 @@ radv_get_debug_option_name(int id); const char * radv_get_perftest_option_name(int id); +struct radv_color_buffer_info { + uint64_t cb_color_base; + uint64_t cb_color_cmask; + uint64_t cb_color_fmask; + uint64_t cb_dcc_base; + uint32_t cb_color_slice; + uint32_t cb_color_view; + uint32_t cb_color_info; + uint32_t cb_color_attrib; + uint32_t cb_color_attrib2; /* GFX9 and later */ + uint32_t cb_color_attrib3; /* GFX10 and later */ + uint32_t cb_dcc_control; + uint32_t cb_color_cmask_slice; + uint32_t cb_color_fmask_slice; + union { + uint32_t cb_color_pitch; // GFX6-GFX8 + uint32_t cb_mrt_epitch; // GFX9+ + }; +}; + +struct radv_ds_buffer_info { + uint64_t db_z_read_base; + uint64_t db_stencil_read_base; + uint64_t db_z_write_base; + uint64_t db_stencil_write_base; + uint64_t db_htile_data_base; + uint32_t db_depth_info; + uint32_t db_z_info; + uint32_t db_stencil_info; + uint32_t db_depth_view; + uint32_t db_depth_size; + uint32_t db_depth_slice; + uint32_t db_htile_surface; + uint32_t pa_su_poly_offset_db_fmt_cntl; + uint32_t db_z_info2; /* GFX9 only */ + uint32_t db_stencil_info2; /* GFX9 only */ + float offset_scale; +}; + +void +radv_initialise_color_surface(struct radv_device *device, + struct radv_color_buffer_info *cb, + struct radv_image_view *iview); +void +radv_initialise_ds_surface(struct radv_device *device, + struct radv_ds_buffer_info *ds, + struct radv_image_view *iview); + /** * Attachment state when recording a renderpass instance. * @@ -1050,6 +1099,11 @@ struct radv_attachment_state { VkClearValue clear_value; VkImageLayout current_layout; struct radv_sample_locations_state sample_location; + + union { + struct radv_color_buffer_info cb; + struct radv_ds_buffer_info ds; + }; }; struct radv_descriptor_state { @@ -1895,60 +1949,13 @@ struct radv_sampler { struct radv_sampler_ycbcr_conversion *ycbcr_sampler; }; -struct radv_color_buffer_info { - uint64_t cb_color_base; - uint64_t cb_color_cmask; - uint64_t cb_color_fmask; - uint64_t cb_dcc_base; - uint32_t cb_color_slice; - uint32_t cb_color_view; - uint32_t cb_color_info; - uint32_t cb_color_attrib; - uint32_t cb_color_attrib2; /* GFX9 and later */ - uint32_t cb_color_attrib3; /* GFX10 and later */ - uint32_t cb_dcc_control; - uint32_t cb_color_cmask_slice; - uint32_t cb_color_fmask_slice; - union { - uint32_t cb_color_pitch; // GFX6-GFX8 - uint32_t cb_mrt_epitch; // GFX9+ - }; -}; - -struct radv_ds_buffer_info { - uint64_t db_z_read_base; - uint64_t db_stencil_read_base; - uint64_t db_z_write_base; - uint64_t db_stencil_write_base; - uint64_t db_htile_data_base; - uint32_t db_depth_info; - uint32_t db_z_info; - uint32_t db_stencil_info; - uint32_t db_depth_view; - uint32_t db_depth_size; - uint32_t db_depth_slice; - uint32_t db_htile_surface; - uint32_t pa_su_poly_offset_db_fmt_cntl; - uint32_t db_z_info2; /* GFX9 only */ - uint32_t db_stencil_info2; /* GFX9 only */ - float offset_scale; -}; - -struct radv_attachment_info { - union { - struct radv_color_buffer_info cb; - struct radv_ds_buffer_info ds; - }; - struct radv_image_view *attachment; -}; - struct radv_framebuffer { uint32_t width; uint32_t height; uint32_t layers; uint32_t attachment_count; - struct radv_attachment_info attachments[0]; + struct radv_image_view *attachments[0]; }; struct radv_subpass_barrier {