broadcom/vc5: Align 1D texture miplevels to 64b.
Fixes tex-miplevel-selection GL2:texture() 1D
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@ -442,6 +442,8 @@ vc5_setup_slices(struct vc5_resource *rsc)
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if (!rsc->tiled) {
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slice->tiling = VC5_TILING_RASTER;
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if (prsc->target == PIPE_TEXTURE_1D)
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level_width = align(level_width, 64 / rsc->cpp);
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} else {
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if ((i != 0 || !uif_top) &&
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(level_width <= utile_w ||
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