pan/bi: Handle nir_tex_src_lod
We need to emit some lowering code to convert it to the 8:8 format expected by the hardware. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
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@ -1030,6 +1030,77 @@ bi_texture_format(nir_alu_type T, enum bifrost_outmod outmod)
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}
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}
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/* TEXC's explicit and bias LOD modes requires the LOD to be transformed to a
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* 16-bit 8:8 fixed-point format. We lower as:
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*
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* F32_TO_S32(clamp(x, -16.0, +16.0) * 256.0) & 0xFFFF =
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* MKVEC(F32_TO_S32(clamp(x * 1.0/16.0, -1.0, 1.0) * (16.0 * 256.0)), #0)
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*/
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static unsigned
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bi_emit_lod_88(bi_context *ctx, unsigned lod, bool fp16)
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{
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nir_alu_type T = fp16 ? nir_type_float16 : nir_type_float32;
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/* Sort of arbitrary. Must be less than 128.0, greater than or equal to
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* the max LOD (16 since we cap at 2^16 texture dimensions), and
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* preferably small to minimize precision loss */
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const float max_lod = 16.0;
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/* FMA.f16/f32.sat_signed, saturated, lod, #1.0/max_lod, #0 */
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bi_instruction fsat = {
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.type = BI_FMA,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_float32,
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.src = { lod, BIR_INDEX_CONSTANT, BIR_INDEX_ZERO },
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.src_types = { T, nir_type_float32, nir_type_float32 },
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.outmod = BIFROST_SAT_SIGNED,
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.roundmode = BIFROST_RTE,
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.constant = {
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.u64 = fui(1.0 / max_lod)
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},
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};
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/* FMA.f32 scaled, saturated, lod, #(max_lod * 256.0), #0 */
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bi_instruction fmul = {
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.type = BI_FMA,
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.dest = bi_make_temp(ctx),
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.dest_type = T,
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.src = { fsat.dest, BIR_INDEX_CONSTANT, BIR_INDEX_ZERO },
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.src_types = { nir_type_float32, nir_type_float32, nir_type_float32 },
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.roundmode = BIFROST_RTE,
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.constant = {
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.u64 = fui(max_lod * 256.0)
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},
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};
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/* F32_TO_S32 s32, scaled */
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bi_instruction f2i = {
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.type = BI_CONVERT,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_int32,
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.src = { fmul.dest },
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.src_types = { T },
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.roundmode = BIFROST_RTZ
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};
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/* MKVEC.v2i16 s32.h0, #0 */
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bi_instruction mkvec = {
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.type = BI_SELECT,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_int16,
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.src = { f2i.dest, BIR_INDEX_ZERO },
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.src_types = { nir_type_int16, nir_type_int16 },
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};
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bi_emit(ctx, fsat);
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bi_emit(ctx, fmul);
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bi_emit(ctx, f2i);
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bi_emit(ctx, mkvec);
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return mkvec.dest;
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}
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/* Data registers required by texturing in the order they appear. All are
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* optional, the texture operation descriptor determines which are present.
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* Note since 3D arrays are not permitted at an API level, Z_COORD and
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@ -1095,6 +1166,8 @@ emit_texc(bi_context *ctx, nir_tex_instr *instr)
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for (unsigned i = 0; i < instr->num_srcs; ++i) {
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unsigned index = pan_src_index(&instr->src[i].src);
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unsigned sz = nir_src_bit_size(instr->src[i].src);
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ASSERTED nir_alu_type base = nir_tex_instr_src_type(instr, i);
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switch (instr->src[i].src_type) {
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case nir_tex_src_coord:
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@ -1103,6 +1176,18 @@ emit_texc(bi_context *ctx, nir_tex_instr *instr)
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tex.src[2] = index;
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tex.swizzle[1][0] = 0;
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tex.swizzle[2][0] = 1;
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break;
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case nir_tex_src_lod:
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if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0) {
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desc.lod_mode = BIFROST_LOD_MODE_ZERO;
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} else {
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assert(base == nir_type_float);
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assert(sz == 16 || sz == 32);
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dregs[BIFROST_TEX_DREG_LOD] =
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bi_emit_lod_88(ctx, index, sz == 16);
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desc.lod_mode = BIFROST_LOD_MODE_EXPLICIT;
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}
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break;
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default:
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unreachable("Unhandled src type in texc emit");
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