svga: Fix typos in comments.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7943>
This commit is contained in:
Vinson Lee 2020-12-05 22:01:35 -08:00
parent 4dbcf24f68
commit 46d2f4b75e
11 changed files with 15 additions and 15 deletions

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@ -1113,7 +1113,7 @@ SVGA3dCmdEndQuery; /* SVGA_3D_CMD_END_QUERY */
*
* A query will be identified by the gmrId and offset of the guestResult
* member. If the device can't find an SVGA_3D_CMD_END_QUERY that has
* been sent previously with an indentical gmrId and offset, it will
* been sent previously with an identical gmrId and offset, it will
* effectively end all queries with an identical type issued with the
* same cid, and the SVGA3dQueryResult structure pointed to by
* guestResult will not be written to. This property can be used to

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@ -273,7 +273,7 @@ typedef enum {
* If this cap is present, the provokingVertexLast field in the
* rasterizer state is enabled. (Guests can then set it to FALSE,
* meaning that the first vertex is the provoking vertex, or TRUE,
* meaning that the last verteix is the provoking vertex.)
* meaning that the last vertex is the provoking vertex.)
*
* If this cap is FALSE, then guests should set the provokingVertexLast
* to FALSE, otherwise rendering behavior is undefined.

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@ -614,7 +614,7 @@ struct {
* reused.
*
* SVGA_CAP_CMD_BUFFERS_2 --
* Enable support for the prepend command buffer submision
* Enable support for the prepend command buffer submission
* registers. SVGA_REG_CMD_PREPEND_LOW and
* SVGA_REG_CMD_PREPEND_HIGH.
*
@ -877,7 +877,7 @@ enum {
*
* 1. If the guest wishes to fully sync (drain) the FIFO,
* it will write once to SYNC then poll on the BUSY
* register. The FIFO is sync'ed once BUSY is zero.
* register. The FIFO is synced once BUSY is zero.
*
* 2. If the guest wants to asynchronously wake up the host,
* it will write once to SYNC without polling on BUSY.
@ -1205,7 +1205,7 @@ typedef struct SVGADisplayTopology {
* memory must come from the GFB. The guest is not allowed to
* access the memory and doing so will have undefined results. The
* backing store is required to be page aligned and the size is
* padded to the next page boundry. The number of pages is:
* padded to the next page boundary. The number of pages is:
* (bytesPerLine * size.width * 4 + PAGE_SIZE - 1) / PAGE_SIZE
*
* The pitch in the backingStore is required to be at least large
@ -1777,7 +1777,7 @@ struct {
* identically-sized region on the same or a different screen.
*
* Note that the source pixels for the COPY in this annotation are
* sampled before applying the anqnotation's associated blit. They
* sampled before applying the annotation's associated blit. They
* are allowed to overlap with the blit's destination pixels.
*
* The copy source rectangle is specified the same way as the blit

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@ -505,7 +505,7 @@ struct svga_context
/* Bitmask of depth/stencil state objects IDs */
struct util_bitmask *ds_object_id_bm;
/* Bitmaks of input element object IDs */
/* Bitmask of input element object IDs */
struct util_bitmask *input_element_object_id_bm;
/* Bitmask of rasterizer object IDs */

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@ -1279,7 +1279,7 @@ svga_render_condition(struct pipe_context *pipe, struct pipe_query *q,
/*
* This function is a workaround because we lack the ability to query
* renderer's time synchornously.
* renderer's time synchronously.
*/
static uint64_t
svga_get_timestamp(struct pipe_context *pipe)

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@ -490,7 +490,7 @@ svga_set_stream_output_targets(struct pipe_context *pipe,
if (svga_have_sm5(svga) && svga->current_so && begin_so_queries) {
/* If there are aleady active queries and we need to start a new streamout,
/* If there are already active queries and we need to start a new streamout,
* we need to stop the current active queries first.
*/
if (svga->in_streamout) {

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@ -116,7 +116,7 @@ svga_create_vs_state(struct pipe_context *pipe,
tgsi_scan_shader(vs->base.tokens, &vs->base.info);
{
/* Need to do construct a new template in case we substitued a
/* Need to do construct a new template in case we substituted a
* debug shader.
*/
struct pipe_shader_state tmp2 = *templ;

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@ -841,7 +841,7 @@ emit_constbuf_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
size = align(size, 16);
}
else {
/* round down to mulitple of 16 (this may cause rendering problems
/* round down to multiple of 16 (this may cause rendering problems
* but should avoid a device error).
*/
size &= ~15;

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@ -541,7 +541,7 @@ svga_validate_surface_view(struct svga_context *svga, struct svga_surface *s)
/**
* DX spec explicitly specifies that no resource can be bound to a render
* target view and a shader resource view simultanously.
* target view and a shader resource view simultaneously.
* So first check if the resource bound to this surface view collides with
* a sampler view. If so, then we will clone this surface view and its
* associated resource. We will then use the cloned surface view for

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@ -2387,7 +2387,7 @@ emit_lit(struct svga_shader_emitter *emit,
return emit_simple_instruction(emit, SVGA3DOP_LIT, insn);
}
else {
/* D3D vs. GL semantics can be fairly easily accomodated by
/* D3D vs. GL semantics can be fairly easily accommodated by
* variations on this sequence.
*
* GL:

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@ -400,7 +400,7 @@ struct svga_winsys_context
* Map a guest-backed surface.
* \param swc The winsys context
* \param surface The surface to map
* \param flags bitmaks of PIPE_MAP_x flags
* \param flags bitmask of PIPE_MAP_x flags
* \param retry Whether to flush and retry the map
* \param rebind Whether to issue an immediate rebind and flush.
*
@ -791,7 +791,7 @@ struct svga_winsys_screen
/** Have SM5 hardware? */
boolean have_sm5;
/** To rebind resources at the beginnning of a new command buffer */
/** To rebind resources at the beginning of a new command buffer */
boolean need_to_rebind_resources;
boolean have_generate_mipmap_cmd;