etnaviv: tgsi: Fix gl_FrontFacing support
The GPU presents the state of the hardware front_face in internal register 0 (i0), the range of which is 0.0f..1.0f. This patch assigns the fragment shader input to this internal register. Moreover, based on the internal front_ccw state, the value of the i0 register is inverted accordingly using SET.EQ/SEQ.NE instruction before being further processed in the shader. This mimics the operation of the NIR compiler. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Jonathan Marek <jonathan@marek.ca> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2868> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2868>
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@ -222,6 +222,16 @@ etna_native_temp(unsigned reg)
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};
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}
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static struct etna_native_reg
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etna_native_internal(unsigned reg)
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{
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return (struct etna_native_reg) {
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.valid = 1,
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.rgroup = INST_RGROUP_INTERNAL,
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.id = reg
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};
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}
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/** Register allocation **/
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enum reg_sort_order {
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FIRST_USE_ASC,
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@ -622,12 +632,19 @@ assign_special_inputs(struct etna_compile *c)
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/* never assign t0 as it is the position output, start assigning at t1 */
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c->next_free_native = 1;
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/* hardwire TGSI_SEMANTIC_POSITION (input and output) to t0 */
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for (int idx = 0; idx < c->total_decls; ++idx) {
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struct etna_reg_desc *reg = &c->decl[idx];
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if (reg->active && reg->semantic.Name == TGSI_SEMANTIC_POSITION)
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if (!reg->active)
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continue;
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/* hardwire TGSI_SEMANTIC_POSITION (input and output) to t0 */
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if (reg->semantic.Name == TGSI_SEMANTIC_POSITION)
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reg->native = etna_native_temp(0);
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/* hardwire TGSI_SEMANTIC_FACE to i0 */
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if (reg->semantic.Name == TGSI_SEMANTIC_FACE)
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reg->native = etna_native_internal(0);
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}
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}
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}
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@ -824,7 +841,34 @@ emit_inst(struct etna_compile *c, struct etna_inst *inst)
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unsigned uni_reg = -1;
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for (int src = 0; src < ETNA_NUM_SRC; ++src) {
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if (etna_rgroup_is_uniform(inst->src[src].rgroup)) {
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if (inst->src[src].rgroup == INST_RGROUP_INTERNAL &&
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c->info.processor == PIPE_SHADER_FRAGMENT &&
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c->key->front_ccw) {
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struct etna_native_reg inner_temp = etna_compile_get_inner_temp(c);
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/*
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* Set temporary register to 0.0 or 1.0 based on the gl_FrontFacing
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* configuration (CW or CCW).
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*/
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etna_assemble(&c->code[c->inst_ptr * 4], &(struct etna_inst) {
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.opcode = INST_OPCODE_SET,
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.cond = INST_CONDITION_NE,
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.dst = etna_native_to_dst(inner_temp, INST_COMPS_X | INST_COMPS_Y |
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INST_COMPS_Z | INST_COMPS_W),
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.src[0] = inst->src[src],
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.src[1] = alloc_imm_f32(c, 1.0f)
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});
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c->inst_ptr++;
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/* Modify instruction to use temp register instead of uniform */
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inst->src[src].use = 1;
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inst->src[src].rgroup = INST_RGROUP_TEMP;
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inst->src[src].reg = inner_temp.id;
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inst->src[src].swiz = INST_SWIZ_IDENTITY; /* swizzling happens on MOV */
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inst->src[src].neg = 0; /* negation happens on MOV */
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inst->src[src].abs = 0; /* abs happens on MOV */
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inst->src[src].amode = 0; /* amode effects happen on MOV */
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} else if (etna_rgroup_is_uniform(inst->src[src].rgroup)) {
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if (uni_reg == -1) { /* first unique uniform used */
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uni_rgroup = inst->src[src].rgroup;
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uni_reg = inst->src[src].reg;
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@ -2037,8 +2081,9 @@ static void
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permute_ps_inputs(struct etna_compile *c)
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{
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/* Special inputs:
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* gl_FragCoord VARYING_SLOT_POS TGSI_SEMANTIC_POSITION
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* gl_PointCoord VARYING_SLOT_PNTC TGSI_SEMANTIC_PCOORD
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* gl_FragCoord VARYING_SLOT_POS TGSI_SEMANTIC_POSITION
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* gl_FrontFacing VARYING_SLOT_FACE TGSI_SEMANTIC_FACE
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* gl_PointCoord VARYING_SLOT_PNTC TGSI_SEMANTIC_PCOORD
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*/
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uint native_idx = 1;
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@ -2047,7 +2092,9 @@ permute_ps_inputs(struct etna_compile *c)
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uint input_id;
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assert(reg->has_semantic);
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if (!reg->active || reg->semantic.Name == TGSI_SEMANTIC_POSITION)
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if (!reg->active ||
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reg->semantic.Name == TGSI_SEMANTIC_POSITION ||
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reg->semantic.Name == TGSI_SEMANTIC_FACE)
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continue;
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input_id = native_idx++;
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@ -2347,10 +2394,6 @@ etna_compile_shader(struct etna_shader_variant *v)
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/* optimize outputs */
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etna_compile_pass_optimize_outputs(c);
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/* XXX assign special inputs: gl_FrontFacing (VARYING_SLOT_FACE)
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* this is part of RGROUP_INTERNAL
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*/
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/* assign inputs: last usage of input should be <= first usage of temp */
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/* potential optimization case:
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* if single MOV TEMP[y], IN[x] before which temp y is not used, and
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