v3d: Add a helper function for getting a nop register.
Just a little refactor to explain what's going on with QFILE_NULL.
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339155122b
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4586f9f902
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@ -698,7 +698,7 @@ ntq_emit_comparison(struct v3d_compile *c,
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if (nir_op_infos[compare_instr->op].num_inputs > 1)
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src1 = ntq_get_alu_src(c, compare_instr, 1);
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bool cond_invert = false;
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struct qreg nop = vir_reg(QFILE_NULL, 0);
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struct qreg nop = vir_nop_reg();
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switch (compare_instr->op) {
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case nir_op_feq32:
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@ -1116,7 +1116,7 @@ emit_frag_end(struct v3d_compile *c)
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struct nir_variable *var = c->output_color_var[0];
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struct qreg *color = &c->outputs[var->data.driver_location * 4];
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vir_SETMSF_dest(c, vir_reg(QFILE_NULL, 0),
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vir_SETMSF_dest(c, vir_nop_reg(),
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vir_AND(c,
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vir_MSF(c),
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vir_FTOC(c, color[3])));
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@ -1153,7 +1153,7 @@ emit_frag_end(struct v3d_compile *c)
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struct qinst *inst = vir_MOV_dest(c,
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vir_reg(QFILE_TLBU, 0),
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vir_reg(QFILE_NULL, 0));
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vir_nop_reg());
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uint8_t tlb_specifier = TLB_TYPE_DEPTH;
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if (c->devinfo->ver >= 42) {
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@ -1888,11 +1888,11 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr)
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case nir_intrinsic_discard:
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if (c->execute.file != QFILE_NULL) {
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vir_PF(c, c->execute, V3D_QPU_PF_PUSHZ);
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vir_set_cond(vir_SETMSF_dest(c, vir_reg(QFILE_NULL, 0),
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vir_set_cond(vir_SETMSF_dest(c, vir_nop_reg(),
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vir_uniform_ui(c, 0)),
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V3D_QPU_COND_IFA);
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} else {
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vir_SETMSF_dest(c, vir_reg(QFILE_NULL, 0),
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vir_SETMSF_dest(c, vir_nop_reg(),
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vir_uniform_ui(c, 0));
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}
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break;
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@ -1908,12 +1908,12 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr)
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*/
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vir_PF(c, vir_OR(c, c->execute, vir_NOT(c, cond)),
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V3D_QPU_PF_PUSHZ);
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vir_set_cond(vir_SETMSF_dest(c, vir_reg(QFILE_NULL, 0),
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vir_set_cond(vir_SETMSF_dest(c, vir_nop_reg(),
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vir_uniform_ui(c, 0)),
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V3D_QPU_COND_IFA);
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} else {
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vir_PF(c, cond, V3D_QPU_PF_PUSHZ);
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vir_set_cond(vir_SETMSF_dest(c, vir_reg(QFILE_NULL, 0),
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vir_set_cond(vir_SETMSF_dest(c, vir_nop_reg(),
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vir_uniform_ui(c, 0)),
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V3D_QPU_COND_IFNA);
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}
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@ -2008,7 +2008,7 @@ ntq_emit_intrinsic(struct v3d_compile *c, nir_intrinsic_instr *instr)
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static void
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ntq_activate_execute_for_block(struct v3d_compile *c)
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{
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vir_set_pf(vir_XOR_dest(c, vir_reg(QFILE_NULL, 0),
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vir_set_pf(vir_XOR_dest(c, vir_nop_reg(),
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c->execute, vir_uniform_ui(c, c->cur_block->index)),
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V3D_QPU_PF_PUSHZ);
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@ -2106,8 +2106,7 @@ ntq_emit_nonuniform_if(struct v3d_compile *c, nir_if *if_stmt)
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if (was_top_level) {
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cond = v3d_qpu_cond_invert(cond);
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} else {
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struct qinst *inst = vir_MOV_dest(c, vir_reg(QFILE_NULL, 0),
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c->execute);
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struct qinst *inst = vir_MOV_dest(c, vir_nop_reg(), c->execute);
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if (cond == V3D_QPU_COND_IFA) {
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vir_set_uf(inst, V3D_QPU_UF_NORNZ);
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} else {
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@ -1028,7 +1028,7 @@ insert_scheduled_instruction(struct v3d_compile *c,
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static struct qinst *
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vir_nop()
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{
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struct qreg undef = { QFILE_NULL, 0 };
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struct qreg undef = vir_nop_reg();
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struct qinst *qinst = vir_add_inst(V3D_QPU_A_NOP, undef, undef, undef);
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return qinst;
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@ -105,6 +105,11 @@ static inline struct qreg vir_reg(enum qfile file, uint32_t index)
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return (struct qreg){file, index};
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}
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static inline struct qreg vir_nop_reg(void)
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{
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return (struct qreg){QFILE_NULL, 0};
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}
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/**
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* A reference to an actual register at the QPU level, for register
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* allocation.
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@ -401,7 +401,7 @@ vir_branch_inst(enum v3d_qpu_branch_cond cond, struct qreg src)
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inst->qpu.branch.ub = true;
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inst->qpu.branch.bdu = V3D_QPU_BRANCH_DEST_REL;
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inst->dst = vir_reg(QFILE_NULL, 0);
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inst->dst = vir_nop_reg();
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inst->src[0] = src;
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inst->uniform = ~0;
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@ -1098,7 +1098,7 @@ vir_PF(struct v3d_compile *c, struct qreg src, enum v3d_qpu_pf pf)
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last_inst != c->defs[src.index] ||
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!vir_can_set_flags(c, last_inst)) {
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/* XXX: Make the MOV be the appropriate type */
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last_inst = vir_MOV_dest(c, vir_reg(QFILE_NULL, 0), src);
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last_inst = vir_MOV_dest(c, vir_nop_reg(), src);
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}
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vir_set_pf(last_inst, pf);
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@ -76,7 +76,7 @@ v3d_qpu_nop(void)
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static struct qinst *
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vir_nop(void)
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{
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struct qreg undef = { QFILE_NULL, 0 };
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struct qreg undef = vir_nop_reg();
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struct qinst *qinst = vir_add_inst(V3D_QPU_A_NOP, undef, undef, undef);
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return qinst;
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