i965: Bump generation assertions on workaround flushes.
I haven't investigated whether these are necessary on Broadwell or not, but for paranoia's sake, we may as well continue doing them for now. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
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@ -529,7 +529,7 @@ brw_emit_pipe_control_write(struct brw_context *brw, uint32_t flags,
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void
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intel_emit_depth_stall_flushes(struct brw_context *brw)
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{
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assert(brw->gen >= 6 && brw->gen <= 7);
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assert(brw->gen >= 6 && brw->gen <= 8);
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brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_STALL);
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brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_CACHE_FLUSH);
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@ -547,7 +547,7 @@ intel_emit_depth_stall_flushes(struct brw_context *brw)
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void
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gen7_emit_vs_workaround_flush(struct brw_context *brw)
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{
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assert(brw->gen == 7);
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assert(brw->gen >= 7 && brw->gen <= 8);
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brw_emit_pipe_control_write(brw,
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PIPE_CONTROL_WRITE_IMMEDIATE
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| PIPE_CONTROL_DEPTH_STALL,
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