pan/midgard: Overhaul tag handling

We unify disparate metadata about tags into a single structure to ensure
information is not left out.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
This commit is contained in:
Alyssa Rosenzweig 2020-02-11 21:20:30 -05:00
parent 9168e7a65d
commit 453c64663c
8 changed files with 70 additions and 113 deletions

View File

@ -479,7 +479,7 @@ mir_exit_block(struct compiler_context *ctx)
static inline bool
mir_is_alu_bundle(midgard_bundle *bundle)
{
return midgard_word_types[bundle->tag] == midgard_word_type_alu;
return IS_ALU(bundle->tag);
}
/* Registers/SSA are distinguish in the backend by the bottom-most bit */

View File

@ -49,31 +49,6 @@ static bool is_instruction_int = false;
static struct midgard_disasm_stats midg_stats;
/* Prints a short form of the tag for branching, the minimum needed to be
* legible and unambiguous */
static void
print_tag_short(FILE *fp, unsigned tag)
{
switch (midgard_word_types[tag]) {
case midgard_word_type_texture:
fprintf(fp, "tex/%X", tag);
break;
case midgard_word_type_load_store:
fprintf(fp, "ldst");
break;
case midgard_word_type_alu:
fprintf(fp, "alu%u/%X", midgard_word_size[tag], tag);
break;
default:
fprintf(fp, "%s%X", (tag > 0) ? "" : "unk", tag);
break;
}
}
static void
print_alu_opcode(FILE *fp, midgard_alu_op op)
{
@ -822,8 +797,8 @@ print_compact_branch_writeout_field(FILE *fp, uint16_t word)
if (br_uncond.offset >= 0)
fprintf(fp, "+");
fprintf(fp, "%d -> ", br_uncond.offset);
print_tag_short(fp, br_uncond.dest_tag);
fprintf(fp, "%d -> %s", br_uncond.offset,
midgard_tag_props[br_uncond.dest_tag].name);
fprintf(fp, "\n");
return br_uncond.offset >= 0;
@ -846,8 +821,8 @@ print_compact_branch_writeout_field(FILE *fp, uint16_t word)
if (br_cond.offset >= 0)
fprintf(fp, "+");
fprintf(fp, "%d -> ", br_cond.offset);
print_tag_short(fp, br_cond.dest_tag);
fprintf(fp, "%d -> %s", br_cond.offset,
midgard_tag_props[br_cond.dest_tag].name);
fprintf(fp, "\n");
return br_cond.offset >= 0;
@ -888,18 +863,15 @@ print_extended_branch_writeout_field(FILE *fp, uint8_t *words, unsigned next)
if (br.offset >= 0)
fprintf(fp, "+");
fprintf(fp, "%d -> ", br.offset);
print_tag_short(fp, br.dest_tag);
fprintf(fp, "\n");
fprintf(fp, "%d -> %s\n", br.offset,
midgard_tag_props[br.dest_tag].name);
unsigned I = next + br.offset * 4;
if (midg_tags[I] && midg_tags[I] != br.dest_tag) {
fprintf(fp, "\t/* XXX TAG ERROR: jumping to ");
print_tag_short(fp, br.dest_tag);
fprintf(fp, " but tagged ");
print_tag_short(fp, midg_tags[I]);
fprintf(fp, " */\n");
fprintf(fp, "\t/* XXX TAG ERROR: jumping to %s but tagged %s \n",
midgard_tag_props[br.dest_tag].name,
midgard_tag_props[midg_tags[I]].name);
}
midg_tags[I] = br.dest_tag;
@ -1571,35 +1543,27 @@ disassemble_midgard(FILE *fp, uint8_t *code, size_t size, unsigned gpu_id, gl_sh
unsigned tag = words[i] & 0xF;
unsigned next_tag = (words[i] >> 4) & 0xF;
fprintf(fp, "\t%X -> %X\n", tag, next_tag);
unsigned num_quad_words = midgard_word_size[tag];
unsigned num_quad_words = midgard_tag_props[tag].size;
if (midg_tags[i] && midg_tags[i] != tag) {
fprintf(fp, "\t/* XXX: TAG ERROR branch, got ");
print_tag_short(fp, tag);
fprintf(fp, " expected ");
print_tag_short(fp, midg_tags[i]);
fprintf(fp, " */\n");
fprintf(fp, "\t/* XXX: TAG ERROR branch, got %s expected %s */\n",
midgard_tag_props[tag].name,
midgard_tag_props[midg_tags[i]].name);
}
midg_tags[i] = tag;
/* Check the tag */
if (last_next_tag > 1) {
if (last_next_tag != tag) {
fprintf(fp, "\t/* XXX: TAG ERROR sequence, got ");
print_tag_short(fp, tag);
fprintf(fp, " expected ");
print_tag_short(fp, last_next_tag);
fprintf(fp, " */\n");
}
} else {
/* TODO: Check ALU case */
if (last_next_tag > TAG_BREAK && last_next_tag != tag) {
fprintf(fp, "\t/* XXX: TAG ERROR sequence, got %s expexted %s */\n",
midgard_tag_props[tag].name,
midgard_tag_props[last_next_tag].name);
}
last_next_tag = next_tag;
switch (midgard_word_types[tag]) {
case midgard_word_type_texture: {
switch (tag) {
case TAG_TEXTURE_4_VTX ... TAG_TEXTURE_4_BARRIER: {
bool interpipe_aliasing =
midgard_get_quirks(gpu_id) & MIDGARD_INTERPIPE_REG_ALIASING;
@ -1609,11 +1573,11 @@ disassemble_midgard(FILE *fp, uint8_t *code, size_t size, unsigned gpu_id, gl_sh
break;
}
case midgard_word_type_load_store:
case TAG_LOAD_STORE_4:
print_load_store_word(fp, &words[i], tabs);
break;
case midgard_word_type_alu:
case TAG_ALU_4 ... TAG_ALU_16_WRITEOUT:
branch_forward = print_alu_word(fp, &words[i], num_quad_words, tabs, i + 4*num_quad_words);
/* Reset word static analysis state */
@ -1630,6 +1594,9 @@ disassemble_midgard(FILE *fp, uint8_t *code, size_t size, unsigned gpu_id, gl_sh
break;
}
if (next_tag == 1)
fprintf(fp, "\n");
/* We are parsing per bundle anyway. Add before we start
* breaking out so we don't miss the final bundle. */

View File

@ -127,17 +127,6 @@
#define UNIT_ADD 1
#define UNIT_LUT 2
/* 4-bit type tags */
#define TAG_TEXTURE_4_VTX 0x2
#define TAG_TEXTURE_4 0x3
#define TAG_TEXTURE_4_BARRIER 0x4
#define TAG_LOAD_STORE_4 0x5
#define TAG_ALU_4 0x8
#define TAG_ALU_8 0x9
#define TAG_ALU_12 0xA
#define TAG_ALU_16 0xB
#define IS_ALU(tag) (tag >= TAG_ALU_4)
/* Special register aliases */
@ -223,6 +212,11 @@ struct mir_ldst_op_props {
unsigned props;
};
struct mir_tag_props {
const char *name;
unsigned size;
};
/* Lower 2-bits are a midgard_reg_mode */
#define GET_LDST_SIZE(c) (c & 3)

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@ -52,6 +52,25 @@ typedef enum {
midgard_alu_lut
} midgard_alu;
enum {
TAG_INVALID = 0x0,
TAG_BREAK = 0x1,
TAG_TEXTURE_4_VTX = 0x2,
TAG_TEXTURE_4 = 0x3,
TAG_TEXTURE_4_BARRIER = 0x4,
TAG_LOAD_STORE_4 = 0x5,
TAG_UNKNOWN_1 = 0x6,
TAG_UNKNOWN_2 = 0x7,
TAG_ALU_4 = 0x8,
TAG_ALU_8 = 0x9,
TAG_ALU_12 = 0xA,
TAG_ALU_16 = 0xB,
TAG_ALU_4_WRITEOUT = 0xC,
TAG_ALU_8_WRITEOUT = 0xD,
TAG_ALU_12_WRITEOUT = 0xE,
TAG_ALU_16_WRITEOUT = 0xF
};
/*
* ALU words
*/

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@ -255,43 +255,21 @@ struct mir_ldst_op_props load_store_opcode_props[256] = {
#undef M32
#undef M64
midgard_word_type midgard_word_types[16] = {
midgard_word_type_unknown, /* 0x0 */
midgard_word_type_unknown, /* 0x1 */
midgard_word_type_texture, /* 0x2 */
midgard_word_type_texture, /* 0x3 */
midgard_word_type_texture, /* 0x4 */
midgard_word_type_load_store, /* 0x5 */
midgard_word_type_unknown, /* 0x6 */
midgard_word_type_unknown, /* 0x7 */
midgard_word_type_alu, /* 0x8 */
midgard_word_type_alu, /* 0x9 */
midgard_word_type_alu, /* 0xA */
midgard_word_type_alu, /* 0xB */
midgard_word_type_alu, /* 0xC */
midgard_word_type_alu, /* 0xD */
midgard_word_type_alu, /* 0xE */
midgard_word_type_alu, /* 0xF */
struct mir_tag_props midgard_tag_props[16] = {
[TAG_INVALID] = {"invalid", 0},
[TAG_BREAK] = {"break", 0},
[TAG_TEXTURE_4_VTX] = {"tex/vt", 1},
[TAG_TEXTURE_4] = {"tex", 1},
[TAG_TEXTURE_4_BARRIER] = {"tex/bar", 1},
[TAG_LOAD_STORE_4] = {"ldst", 1},
[TAG_UNKNOWN_1] = {"unk1", 1},
[TAG_UNKNOWN_2] = {"unk2", 1},
[TAG_ALU_4] = {"alu/4", 1},
[TAG_ALU_8] = {"alu/8", 2},
[TAG_ALU_12] = {"alu/12", 3},
[TAG_ALU_16] = {"alu/16", 4},
[TAG_ALU_4_WRITEOUT] = {"aluw/4", 1},
[TAG_ALU_8_WRITEOUT] = {"aluw/8", 2},
[TAG_ALU_12_WRITEOUT] = {"aluw/12", 3},
[TAG_ALU_16_WRITEOUT] = {"aluw/16", 4}
};
unsigned midgard_word_size[16] = {
0, /* 0x0 */
0, /* 0x1 */
1, /* 0x2 */
1, /* 0x3 */
1, /* 0x4 */
1, /* 0x5 */
0, /* 0x6 */
0, /* 0x7 */
1, /* 0x8 */
2, /* 0x9 */
3, /* 0xA */
4, /* 0xB */
1, /* 0xC */
2, /* 0xD */
3, /* 0xE */
4, /* 0xF */
};

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@ -28,8 +28,7 @@
extern struct mir_op_props alu_opcode_props[256];
extern struct mir_ldst_op_props load_store_opcode_props[256];
extern midgard_word_type midgard_word_types[16];
extern unsigned midgard_word_size[16];
extern struct mir_tag_props midgard_tag_props[16];
#define OP_IS_STORE(op) (load_store_opcode_props[op].props & LDST_STORE)

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@ -1128,7 +1128,7 @@ schedule_block(compiler_context *ctx, midgard_block *block)
if (bundle.has_blend_constant)
blend_offset = block->quadword_count;
block->quadword_count += midgard_word_size[bundle.tag];
block->quadword_count += midgard_tag_props[bundle.tag].size;
}
/* We emitted bundles backwards; copy into the block in reverse-order */

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@ -588,7 +588,7 @@ mir_insert_instruction_before_scheduled(
memcpy(bundles + before, &new, sizeof(new));
list_addtail(&new.instructions[0]->link, &before_bundle->instructions[0]->link);
block->quadword_count += midgard_word_size[new.tag];
block->quadword_count += midgard_tag_props[new.tag].size;
}
void
@ -613,7 +613,7 @@ mir_insert_instruction_after_scheduled(
midgard_bundle new = mir_bundle_for_op(ctx, ins);
memcpy(bundles + after + 1, &new, sizeof(new));
list_add(&new.instructions[0]->link, &after_bundle->instructions[after_bundle->instruction_count - 1]->link);
block->quadword_count += midgard_word_size[new.tag];
block->quadword_count += midgard_tag_props[new.tag].size;
}
/* Flip the first-two arguments of a (binary) op. Currently ALU