KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Add sqrt() builtin as an IR operation. 

Following a discussion in #dri-devel, I think this makes more sense
than implementing it as RSQ RCP CMP as Mesa did.  The i965 has a
hardware sqrt that should work, and AMD is suppposed to be able to
implement it as RSQ RCP with an alternate floating point mode so that
the 0.0 case is handled like we want.
This commit is contained in:
Eric Anholt 2010-03-27 13:01:51 -07:00 committed by Ian Romanick
parent ddd2e83db2
commit 44d68fd06f
3 changed files with 11 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
builtin_function.cpp
View File

@ -84,6 +84,14 @@ generate_rsq(exec_list *instructions,
generate_unop(instructions, declarations, type, ir_unop_rsq);
}
static void
generate_sqrt(exec_list *instructions,
ir_variable **declarations,
const glsl_type *type)
{
generate_unop(instructions, declarations, type, ir_unop_sqrt);
}
static void
generate_abs(exec_list *instructions,
ir_variable **declarations,
@ -227,7 +235,7 @@ generate_110_functions(glsl_symbol_table *symtab, exec_list *instructions)
make_gentype_function(symtab, instructions, "log", 1, generate_log);
/* FINISHME: exp2() */
/* FINISHME: log2() */
/* FINISHME: sqrt() */
make_gentype_function(symtab, instructions, "sqrt", 1, generate_sqrt);
make_gentype_function(symtab, instructions, "inversesqrt", 1, generate_rsq);
make_gentype_function(symtab, instructions, "abs", 1, generate_abs);
/* FINISHME: sign() */

1
ir.h
View File

@ -225,6 +225,7 @@ enum ir_expression_operation {
ir_unop_abs,
ir_unop_rcp,
ir_unop_rsq,
ir_unop_sqrt,
ir_unop_exp,
ir_unop_log,
ir_unop_f2i, /**< Float-to-integer conversion. */

1
ir_print_visitor.cpp
View File

@ -93,6 +93,7 @@ void ir_print_visitor::visit(ir_expression *ir)
"abs",
"rcp",
"rsq",
"sqrt",
"exp",
"log",
"f2i",