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asahi: Handle uncompressed Z32F depth buffers 

This uses a subset of the depth/stencil infrastructure we built out to
support writing back tiled, uncompressed Z32F depth buffers to memory.
Texturing from this format is already supported.

This gets glmark2 -bshadow working.

v2: Fix partial renders

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
This commit is contained in:
Alyssa Rosenzweig 2022-02-21 20:02:41 -05:00
parent c955dd726e
commit 43f6c08a3b
2 changed files with 60 additions and 16 deletions
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20
src/asahi/lib/cmdbuf.xml
View File

@ -558,14 +558,17 @@
<field name="Scissor array" start="14:0" size="64" type="address"/>
<!-- Points to zeroes, allocation of 0xc0000 bytes unknwon type 28000000 -->
<field name="Unknown buffer" start="16:0" size="64" type="address"/>
<field name="Depth pipeline unk" start="20:0" size="4" default="4" type="hex"/>
<!-- 0xc0150 with depth clear and z32f and s8
0x40150 with z32f and s8
0x40 with z32f
0x4000040 with z16?
<!-- 0xc0154 with depth clear and z32f and s8
0x40154 with z32f and s8
0x44 with z32f
0x4000044 with z16?
-->
<field name="Depth pipeline" start="20:4" size="28" type="address" modifier="shr(4)"/>
<field name="Depth unknown 1" start="26:0" size="32" type="hex"/>
<field name="Depth flags" start="20:0" size="32" type="hex"/>
<field name="Depth compression" start="20:6" size="1" type="bool"/>
<field name="Depth reload" start="20:15" size="1" type="bool"/>
<field name="Depth format 16 unorm" start="20:26" size="1" type="bool"/>
<field name="Depth width" start="26:0" size="15" type="uint" default="1" modifier="minus(1)"/>
<field name="Depth height" start="26:15" size="15" type="uint" default="1" modifier="minus(1)"/>
<field name="Depth buffer (if clearing)" start="28:0" size="64" type="address"/>
<field name="Depth acceleration buffer (if clearing)" start="34:0" size="64" type="address"/>
<!-- bytes unknown type 888F50 -->
@ -593,7 +596,8 @@
<field name="Depth clear value" start="0:0" size="32" type="hex"/>
<field name="Stencil clear value" start="1:0" size="8" type="uint"/>
<field name="Unk 1" start="1:8" size="8" type="hex" default="3"/>
<field name="Unk 2" start="3:8" size="8" type="hex" default="0"/>
<field name="Set when reloading Z 1" start="3:8" size="1" type="bool"/>
<field name="Set when reloading Z 2" start="4:24" size="1" type="bool"/>
<field name="Z16 Unorm attachment" start="5:8" size="1" type="bool"/>
<field name="Unk 3" start="6:0" size="32" type="hex" default="0xffffffff"/>
<field name="Unk 4" start="7:0" size="32" type="hex" default="0xffffffff"/>

56
src/gallium/drivers/asahi/magic.c
View File

@ -95,6 +95,18 @@ asahi_classify_attachment(enum pipe_format format)
return AGX_IOGPU_ATTACHMENT_TYPE_COLOUR;
}
static uint64_t
agx_map_surface_resource(struct pipe_surface *surf, struct agx_resource *rsrc)
{
return agx_map_texture_gpu(rsrc, surf->u.tex.level, surf->u.tex.first_layer);
}
static uint64_t
agx_map_surface(struct pipe_surface *surf)
{
return agx_map_surface_resource(surf, agx_resource(surf->texture));
}
static void
asahi_pack_iogpu_attachment(void *out, struct agx_resource *rsrc,
struct pipe_surface *surf,
@ -105,12 +117,8 @@ asahi_pack_iogpu_attachment(void *out, struct agx_resource *rsrc,
agx_pack(out, IOGPU_ATTACHMENT, cfg) {
cfg.type = asahi_classify_attachment(rsrc->base.format);
cfg.address = agx_map_texture_gpu(rsrc, surf->u.tex.level,
surf->u.tex.first_layer);
cfg.address = agx_map_surface_resource(surf, rsrc);
cfg.size = rsrc->slices[surf->u.tex.level].size;
cfg.percent = (100 * cfg.size) / total_size;
}
}
@ -177,6 +185,9 @@ demo_cmdbuf(uint64_t *buf, size_t size,
uint64_t unk_buffer = demo_zero(pool, 0x1000);
uint64_t unk_buffer_2 = demo_zero(pool, 0x8000);
uint64_t depth_buffer = 0;
uint64_t stencil_buffer = 0;
agx_pack(map + 160, IOGPU_INTERNAL_PIPELINES, cfg) {
cfg.clear_pipeline_bind = 0xffff8002 | (clear_pipeline_textures ? 0x210 : 0);
cfg.clear_pipeline = pipeline_clear;
@ -184,19 +195,46 @@ demo_cmdbuf(uint64_t *buf, size_t size,
cfg.store_pipeline = pipeline_store;
cfg.scissor_array = scissor_ptr;
cfg.unknown_buffer = unk_buffer;
if (framebuffer->zsbuf) {
struct pipe_surface *zsbuf = framebuffer->zsbuf;
const struct util_format_description *desc =
util_format_description(zsbuf->texture->format);
// note: setting 0x4 bit here breaks partial render with depth
cfg.depth_flags = 0x80000; // no compression, clear
cfg.depth_width = framebuffer->width;
cfg.depth_height = framebuffer->height;
if (util_format_has_depth(desc)) {
depth_buffer = agx_map_surface(zsbuf);
} else {
stencil_buffer = agx_map_surface(zsbuf);
}
if (agx_resource(zsbuf->texture)->separate_stencil) {
stencil_buffer = agx_map_surface_resource(zsbuf,
agx_resource(zsbuf->texture)->separate_stencil);
}
cfg.stencil_buffer = stencil_buffer;
cfg.stencil_buffer_2 = stencil_buffer;
cfg.depth_buffer = depth_buffer;
cfg.depth_buffer_if_clearing = depth_buffer;
}
}
agx_pack(map + 228, IOGPU_AUX_FRAMEBUFFER, cfg) {
cfg.width = framebuffer->width;
cfg.height = framebuffer->height;
cfg.z16_unorm_attachment = false;
cfg.pointer = unk_buffer_2;
}
agx_pack(map + 292, IOGPU_CLEAR_Z_S, cfg) {
cfg.depth_clear_value = fui(1.0); // 32-bit float
cfg.depth_clear_value = fui(1.0); // TODO
cfg.stencil_clear_value = 0;
cfg.z16_unorm_attachment = false;
}
map[312] = 0xffff8212;
@ -205,6 +243,8 @@ demo_cmdbuf(uint64_t *buf, size_t size,
map[322] = pipeline_store | 0x4;
agx_pack(map + 356, IOGPU_MISC, cfg) {
cfg.depth_buffer = depth_buffer;
cfg.stencil_buffer = stencil_buffer;
cfg.encoder_id = encoder_id;
cfg.unknown_buffer = demo_unk6(pool);
cfg.width = framebuffer->width;