freedreno/a6xx: Rename the RB_BLIT_INFO.INTEGER field to SAMPLE_0.
As @samuelig found, this is the field for disabling sample averaging and using sample 0 instead. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9661>
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@ -2126,7 +2126,7 @@ to upconvert to 32b float internally?
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<reg32 offset="0x88e3" name="RB_BLIT_INFO">
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<bitfield name="UNK0" pos="0" type="boolean"/> <!-- s8 stencil restore/clear? But also color restore? -->
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<bitfield name="GMEM" pos="1" type="boolean"/> <!-- set for restore and clear to gmem? -->
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<bitfield name="INTEGER" pos="2" type="boolean"/> <!-- probably -->
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<bitfield name="SAMPLE_0" pos="2" type="boolean"/> <!-- takes sample 0 instead of averaging -->
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<bitfield name="DEPTH" pos="3" type="boolean"/> <!-- z16/z32/z24s8/x24x8 clear or resolve? -->
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<doc>
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For clearing depth/stencil
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@ -2383,8 +2383,7 @@ tu_emit_blit(struct tu_cmd_buffer *cmd,
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tu_cs_emit_regs(cs, A6XX_RB_BLIT_INFO(
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.unk0 = !resolve,
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.gmem = !resolve,
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/* "integer" bit disables msaa resolve averaging */
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.integer = vk_format_is_int(attachment->format) |
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.sample_0 = vk_format_is_int(attachment->format) |
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vk_format_is_depth_or_stencil(attachment->format)));
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tu_cs_emit_pkt4(cs, REG_A6XX_RB_BLIT_DST_INFO, 4);
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@ -942,7 +942,7 @@ emit_restore_blit(struct fd_batch *batch,
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OUT_REG(ring, A6XX_RB_BLIT_INFO(
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.gmem = true, .unk0 = true,
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.depth = (buffer == FD_BUFFER_DEPTH),
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.integer = util_format_is_pure_integer(psurf->format)));
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.sample_0 = util_format_is_pure_integer(psurf->format)));
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emit_blit(batch, ring, base, psurf, stencil);
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}
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@ -1256,7 +1256,7 @@ emit_resolve_blit(struct fd_batch *batch,
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}
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if (util_format_is_pure_integer(psurf->format))
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info |= A6XX_RB_BLIT_INFO_INTEGER;
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info |= A6XX_RB_BLIT_INFO_SAMPLE_0;
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OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
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OUT_RING(ring, info);
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